Xtensa patchset for 3.7
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Merge tag 'xtensa-next-20121008' of git://github.com/czankel/xtensa-linux
Pull Xtensa patchset from Chris Zankel:
"The Xtensa tree has been broken for some time now, and this patchset
brings it back to life. It has been part of the linux-next tree for
some time.
Most changes are inside the xtensa subdirectory; the other changes
mostly add another rule to already existing #ifdefs to exclude Xtensa,
where required. The only 'common' change is to add two more sections
('.xt.prop' and '.xt.lit') to the white list in modpost."
* tag 'xtensa-next-20121008' of git://github.com/czankel/xtensa-linux: (27 commits)
xtensa: Setup CROSS_COMPILE at the top
xtensa: drop CONFIG_EMBEDDED_RAMDISK
xtensa: fix TIOCGSERIAL and TIOCSSERIAL definitions
xtensa: provide dummy gcc intrinsics
xtensa: add missing symbol exports
parport: disable for xtensa arch
xtensa: rename MISC SR definition to avoid name clashes
hisax: disable build for big-endian xtensa
xtensa: fix CODA build
xtensa: fix parallel make
xtensa: ISS: drop unused io.c
xtensa: ISS: exit simulator in case of halt or poweroff
xtensa: ISS: change keyboard polling rate
xtensa: ISS: add platform_pcibios_init
xtensa: ISS: add dummy serial.h for ISS platform
xtensa: change default platform clock frequency to 10MHz
xtensa: add ARCH_WANT_OPTIONAL_GPIOLIB to xtensa config
xtensa: set NO_IOPORT to 'n' by default
xtensa: adopt generic io routines
xtensa: fix ioremap
...
This commit is contained in:
Linus Torvalds
commit
1ea4f4f840
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@ -7170,6 +7170,8 @@ F: drivers/char/tlclk.c
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TENSILICA XTENSA PORT (xtensa)
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M: Chris Zankel <chris@zankel.net>
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M: Max Filippov <jcmvbkbc@gmail.com>
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L: linux-xtensa@linux-xtensa.org
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S: Maintained
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F: arch/xtensa/
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@ -11,6 +11,9 @@ config XTENSA
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select HAVE_GENERIC_HARDIRQS
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select GENERIC_IRQ_SHOW
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select GENERIC_CPU_DEVICES
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select MODULES_USE_ELF_RELA
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select GENERIC_PCI_IOMAP
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select ARCH_WANT_OPTIONAL_GPIOLIB
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help
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Xtensa processors are 32-bit RISC machines designed by Tensilica
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primarily for embedded systems. These processors are both
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@ -35,7 +38,7 @@ config ARCH_HAS_ILOG2_U64
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def_bool n
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config NO_IOPORT
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def_bool y
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def_bool n
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config HZ
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int
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@ -142,6 +145,7 @@ config XTENSA_PLATFORM_XT2000
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config XTENSA_PLATFORM_S6105
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bool "S6105"
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select SERIAL_CONSOLE
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select NO_IOPORT
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endchoice
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@ -205,23 +209,6 @@ source "drivers/Kconfig"
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source "fs/Kconfig"
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menu "Xtensa initrd options"
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depends on BLK_DEV_INITRD
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config EMBEDDED_RAMDISK
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bool "Embed root filesystem ramdisk into the kernel"
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config EMBEDDED_RAMDISK_IMAGE
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string "Filename of gzipped ramdisk image"
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depends on EMBEDDED_RAMDISK
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default "ramdisk.gz"
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help
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This is the filename of the ramdisk image to be built into the
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kernel. Relative pathnames are relative to arch/xtensa/boot/ramdisk/.
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The ramdisk image is not part of the kernel distribution; you must
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provide one yourself.
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endmenu
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source "arch/xtensa/Kconfig.debug"
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source "security/Kconfig"
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@ -21,6 +21,18 @@ variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM) := custom
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VARIANT = $(variant-y)
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export VARIANT
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# Test for cross compiling
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ifneq ($(VARIANT),)
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COMPILE_ARCH = $(shell uname -m)
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ifneq ($(COMPILE_ARCH), xtensa)
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ifndef CROSS_COMPILE
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CROSS_COMPILE = xtensa_$(VARIANT)-
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endif
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endif
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endif
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# Platform configuration
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platform-$(CONFIG_XTENSA_PLATFORM_XT2000) := xt2000
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@ -31,7 +43,7 @@ PLATFORM = $(platform-y)
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export PLATFORM
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# temporarily until string.h is fixed
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KBUILD_CFLAGS += -ffreestanding
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KBUILD_CFLAGS += -ffreestanding -D__linux__
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KBUILD_CFLAGS += -pipe -mlongcalls
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@ -48,24 +60,6 @@ endif
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KBUILD_DEFCONFIG := iss_defconfig
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# ramdisk/initrd support
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# You need a compressed ramdisk image, named ramdisk.gz in
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# arch/xtensa/boot/ramdisk
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core-$(CONFIG_EMBEDDED_RAMDISK) += arch/xtensa/boot/ramdisk/
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# Test for cross compiling
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ifneq ($(VARIANT),)
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COMPILE_ARCH = $(shell uname -m)
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ifneq ($(COMPILE_ARCH), xtensa)
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ifndef CROSS_COMPILE
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CROSS_COMPILE = xtensa_$(VARIANT)-
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endif
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endif
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endif
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# Only build variant and/or platform if it includes a Makefile
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buildvar := $(shell test -e $(srctree)/arch/xtensa/variants/$(VARIANT)/Makefile && echo arch/xtensa/variants/$(VARIANT)/)
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@ -87,7 +81,7 @@ all: zImage
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bzImage : zImage
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zImage zImage.initrd: vmlinux
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zImage: vmlinux
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$(Q)$(MAKE) $(build)=$(boot) $@
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define archhelp
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@ -25,7 +25,7 @@ bootdir-$(CONFIG_XTENSA_PLATFORM_ISS) += boot-elf
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bootdir-$(CONFIG_XTENSA_PLATFORM_XT2000) += boot-redboot boot-elf
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zImage zImage.initrd Image Image.initrd: $(bootdir-y)
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zImage Image: $(bootdir-y)
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$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
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$(addprefix $(obj)/,$(host-progs))
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@ -20,9 +20,11 @@ boot-y := bootstrap.o
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OBJS := $(addprefix $(obj)/,$(boot-y))
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Image: vmlinux $(OBJS) arch/$(ARCH)/boot/boot-elf/boot.lds
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vmlinux.tmp: vmlinux
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$(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \
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vmlinux vmlinux.tmp
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$^ $@
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Image: vmlinux.tmp $(OBJS) arch/$(ARCH)/boot/boot-elf/boot.lds
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$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
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--add-section image=vmlinux.tmp \
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--set-section-flags image=contents,alloc,load,load,data \
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@ -30,24 +32,6 @@ Image: vmlinux $(OBJS) arch/$(ARCH)/boot/boot-elf/boot.lds
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$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
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-T arch/$(ARCH)/boot/boot-elf/boot.lds \
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-o arch/$(ARCH)/boot/$@.elf $@.tmp
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rm -f $@.tmp vmlinux.tmp
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Image.initrd: vmlinux $(OBJS)
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$(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \
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--add-section .initrd=arch/$(ARCH)/boot/ramdisk \
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--set-section-flags .initrd=contents,alloc,load,load,data \
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vmlinux vmlinux.tmp
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$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
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--add-section image=vmlinux.tmp \
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--set-section-flags image=contents,alloc,load,load,data \
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$(OBJS) $@.tmp
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$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
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-T $(srctree)/arch/$(ARCH)/boot/boot-elf/boot.ld \
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-o arch/$(ARCH)/boot/$@.elf $@.tmp
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rm -f $@.tmp vmlinux.tmp
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zImage: Image
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zImage.initrd: Image.initrd
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@ -33,13 +33,6 @@ SECTIONS
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__reloc_end = . ;
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.initrd ALIGN(0x10) :
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{
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boot_initrd_start = . ;
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*(.initrd)
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boot_initrd_end = .;
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}
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. = ALIGN(0x10);
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__image_load = . ;
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.image 0xd0001000:
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@ -21,15 +21,17 @@ LIBS := arch/xtensa/boot/lib/lib.a arch/xtensa/lib/lib.a
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LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
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zImage: vmlinux $(OBJS) $(LIBS)
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vmlinux.tmp: vmlinux
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$(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \
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vmlinux vmlinux.tmp
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gzip -vf9 vmlinux.tmp
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$^ $@
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vmlinux.tmp.gz: vmlinux.tmp
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$(GZIP) $(GZIP_FLAGS) $^ > $@
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zImage: vmlinux.tmp.gz $(OBJS) $(LIBS)
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$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
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--add-section image=vmlinux.tmp.gz \
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--set-section-flags image=contents,alloc,load,load,data \
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$(OBJS) $@.tmp
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$(LD) $(LD_ARGS) -o $@.elf $@.tmp $(LIBS) -L/xtensa-elf/lib $(LIBGCC)
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$(OBJCOPY) -S -O binary $@.elf arch/$(ARCH)/boot/$@.redboot
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rm -f $@.tmp $@.elf vmlinux.tmp.gz
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@ -31,13 +31,6 @@ SECTIONS
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__reloc_end = . ;
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.initrd ALIGN(0x10) :
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{
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boot_initrd_start = . ;
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*(.initrd)
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boot_initrd_end = .;
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}
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. = ALIGN(0x10);
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__image_load = . ;
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.image 0xd0001000: AT(__image_load)
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@ -226,17 +226,7 @@ _reloc:
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isync
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movi a5, __start
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movi a3, boot_initrd_start
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movi a4, boot_initrd_end
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sub a3, a3, a5
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sub a4, a4, a5
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add a3, a0, a3
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add a4, a0, a4
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# a2 Boot parameter list
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# a3 initrd_start (virtual load address)
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# a4 initrd_end (virtual load address)
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movi a0, _image_start
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jx a0
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@ -1,23 +0,0 @@
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#
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# Makefile for a ramdisk image
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#
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BIG_ENDIAN := $(shell echo -e "\#ifdef __XTENSA_EL__\nint little;\n\#else\nint big;\n\#endif" | $(CC) -E -|grep -c big)
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ifeq ($(BIG_ENDIAN),1)
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OBJCOPY_ARGS := -O elf32-xtensa-be
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else
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OBJCOPY_ARGS := -O elf32-xtensa-le
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endif
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obj-y = ramdisk.o
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RAMDISK_IMAGE = arch/$(ARCH)/boot/ramdisk/$(CONFIG_EMBEDDED_RAMDISK_IMAGE)
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arch/$(ARCH)/boot/ramdisk/ramdisk.o:
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$(Q)echo -e "dummy:" | $(AS) -o $@;
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$(Q)$(OBJCOPY) $(OBJCOPY_ARGS) \
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--add-section .initrd=$(RAMDISK_IMAGE) \
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--set-section-flags .initrd=contents,alloc,load,load,data \
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arch/$(ARCH)/boot/ramdisk/ramdisk.o $@
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@ -540,11 +540,6 @@ CONFIG_MSDOS_PARTITION=y
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# CONFIG_NLS is not set
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# CONFIG_DLM is not set
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#
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# Xtensa initrd options
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#
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# CONFIG_EMBEDDED_RAMDISK is not set
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#
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# Kernel hacking
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#
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@ -25,184 +25,54 @@
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#define XCHAL_KIO_SIZE 0x10000000
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#define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x))
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#define IO_SPACE_LIMIT ~0
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#ifdef CONFIG_MMU
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/*
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* swap functions to change byte order from little-endian to big-endian and
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* vice versa.
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*/
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static inline unsigned short _swapw (unsigned short v)
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{
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return (v << 8) | (v >> 8);
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}
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static inline unsigned int _swapl (unsigned int v)
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{
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return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24);
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}
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/*
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* Change virtual addresses to physical addresses and vv.
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* These are trivial on the 1:1 Linux/Xtensa mapping
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*/
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static inline unsigned long virt_to_phys(volatile void * address)
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{
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return __pa(address);
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}
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static inline void * phys_to_virt(unsigned long address)
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{
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return __va(address);
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}
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|
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/*
|
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* virt_to_bus and bus_to_virt are deprecated.
|
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*/
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#define virt_to_bus(x) virt_to_phys(x)
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#define bus_to_virt(x) phys_to_virt(x)
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/*
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* Return the virtual (cached) address for the specified bus memory.
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* Return the virtual address for the specified bus memory.
|
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* Note that we currently don't support any address outside the KIO segment.
|
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*/
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static inline void *ioremap(unsigned long offset, unsigned long size)
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static inline void __iomem *ioremap_nocache(unsigned long offset,
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unsigned long size)
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{
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#ifdef CONFIG_MMU
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if (offset >= XCHAL_KIO_PADDR
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&& offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE)
|
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&& offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
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return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);
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else
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BUG();
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#else
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return (void *)offset;
|
||||
#endif
|
||||
}
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static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
|
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static inline void __iomem *ioremap_cache(unsigned long offset,
|
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unsigned long size)
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{
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#ifdef CONFIG_MMU
|
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if (offset >= XCHAL_KIO_PADDR
|
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&& offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE)
|
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&& offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
|
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return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR);
|
||||
else
|
||||
BUG();
|
||||
#else
|
||||
return (void *)offset;
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void iounmap(void *addr)
|
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#define ioremap_wc ioremap_nocache
|
||||
|
||||
static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
|
||||
{
|
||||
return ioremap_nocache(offset, size);
|
||||
}
|
||||
|
||||
static inline void iounmap(volatile void __iomem *addr)
|
||||
{
|
||||
}
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
/*
|
||||
* Generic I/O
|
||||
*/
|
||||
|
||||
#define readb(addr) \
|
||||
({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
|
||||
#define readw(addr) \
|
||||
({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
|
||||
#define readl(addr) \
|
||||
({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
|
||||
#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
|
||||
#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
|
||||
#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
|
||||
|
||||
static inline __u8 __raw_readb(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(__force volatile __u8 *)(addr);
|
||||
}
|
||||
static inline __u16 __raw_readw(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(__force volatile __u16 *)(addr);
|
||||
}
|
||||
static inline __u32 __raw_readl(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(__force volatile __u32 *)(addr);
|
||||
}
|
||||
static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
|
||||
{
|
||||
*(__force volatile __u8 *)(addr) = b;
|
||||
}
|
||||
static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
|
||||
{
|
||||
*(__force volatile __u16 *)(addr) = b;
|
||||
}
|
||||
static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
|
||||
{
|
||||
*(__force volatile __u32 *)(addr) = b;
|
||||
}
|
||||
|
||||
/* These are the definitions for the x86 IO instructions
|
||||
* inb/inw/inl/outb/outw/outl, the "string" versions
|
||||
* insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
|
||||
* inb_p/inw_p/...
|
||||
* The macros don't do byte-swapping.
|
||||
*/
|
||||
|
||||
#define inb(port) readb((u8 *)((port)))
|
||||
#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port)))
|
||||
#define inw(port) readw((u16 *)((port)))
|
||||
#define outw(val, port) writew((val),(u16 *)((unsigned long)(port)))
|
||||
#define inl(port) readl((u32 *)((port)))
|
||||
#define outl(val, port) writel((val),(u32 *)((unsigned long)(port)))
|
||||
|
||||
#define inb_p(port) inb((port))
|
||||
#define outb_p(val, port) outb((val), (port))
|
||||
#define inw_p(port) inw((port))
|
||||
#define outw_p(val, port) outw((val), (port))
|
||||
#define inl_p(port) inl((port))
|
||||
#define outl_p(val, port) outl((val), (port))
|
||||
|
||||
extern void insb (unsigned long port, void *dst, unsigned long count);
|
||||
extern void insw (unsigned long port, void *dst, unsigned long count);
|
||||
extern void insl (unsigned long port, void *dst, unsigned long count);
|
||||
extern void outsb (unsigned long port, const void *src, unsigned long count);
|
||||
extern void outsw (unsigned long port, const void *src, unsigned long count);
|
||||
extern void outsl (unsigned long port, const void *src, unsigned long count);
|
||||
|
||||
#define IO_SPACE_LIMIT ~0
|
||||
|
||||
#define memset_io(a,b,c) memset((void *)(a),(b),(c))
|
||||
#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
|
||||
#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
|
||||
|
||||
/* At this point the Xtensa doesn't provide byte swap instructions */
|
||||
|
||||
#ifdef __XTENSA_EB__
|
||||
# define in_8(addr) (*(u8*)(addr))
|
||||
# define in_le16(addr) _swapw(*(u16*)(addr))
|
||||
# define in_le32(addr) _swapl(*(u32*)(addr))
|
||||
# define out_8(b, addr) *(u8*)(addr) = (b)
|
||||
# define out_le16(b, addr) *(u16*)(addr) = _swapw(b)
|
||||
# define out_le32(b, addr) *(u32*)(addr) = _swapl(b)
|
||||
#elif defined(__XTENSA_EL__)
|
||||
# define in_8(addr) (*(u8*)(addr))
|
||||
# define in_le16(addr) (*(u16*)(addr))
|
||||
# define in_le32(addr) (*(u32*)(addr))
|
||||
# define out_8(b, addr) *(u8*)(addr) = (b)
|
||||
# define out_le16(b, addr) *(u16*)(addr) = (b)
|
||||
# define out_le32(b, addr) *(u32*)(addr) = (b)
|
||||
#else
|
||||
# error processor byte order undefined!
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* Convert a physical pointer to a virtual kernel pointer for /dev/mem access
|
||||
*/
|
||||
#define xlate_dev_mem_ptr(p) __va(p)
|
||||
|
||||
/*
|
||||
* Convert a virtual cached pointer to an uncached pointer
|
||||
*/
|
||||
#define xlate_dev_kmem_ptr(p) p
|
||||
|
||||
#define readb_relaxed readb
|
||||
#define readw_relaxed readw
|
||||
#define readl_relaxed readl
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
||||
#endif /* _XTENSA_IO_H */
|
||||
|
|
|
|||
|
|
@ -71,8 +71,8 @@
|
|||
#define TIOCSSOFTCAR _IOW('T', 26, unsigned int)
|
||||
#define TIOCLINUX _IOW('T', 28, char)
|
||||
#define TIOCCONS _IO('T', 29)
|
||||
#define TIOCGSERIAL _IOR('T', 30, struct serial_struct)
|
||||
#define TIOCSSERIAL _IOW('T', 31, struct serial_struct)
|
||||
#define TIOCGSERIAL 0x803C541E /*_IOR('T', 30, struct serial_struct)*/
|
||||
#define TIOCSSERIAL 0x403C541F /*_IOW('T', 31, struct serial_struct)*/
|
||||
#define TIOCPKT _IOW('T', 32, int)
|
||||
# define TIOCPKT_DATA 0
|
||||
# define TIOCPKT_FLUSHREAD 1
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@
|
|||
#define ICOUNTLEVEL 237
|
||||
#define EXCVADDR 238
|
||||
#define CCOMPARE 240
|
||||
#define MISC 244
|
||||
#define MISC_SR 244
|
||||
|
||||
/* Special names for read-only and write-only interrupt registers. */
|
||||
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ extra-y := head.o vmlinux.lds
|
|||
|
||||
obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \
|
||||
setup.o signal.o syscall.o time.o traps.o vectors.o platform.o \
|
||||
pci-dma.o io.o
|
||||
pci-dma.o
|
||||
|
||||
obj-$(CONFIG_KGDB) += xtensa-stub.o
|
||||
obj-$(CONFIG_PCI) += pci.o
|
||||
|
|
@ -24,6 +24,7 @@ obj-$(CONFIG_MODULES) += xtensa_ksyms.o module.o
|
|||
# Replicate rules in scripts/Makefile.build
|
||||
|
||||
sed-y = -e 's/\*(\(\.[a-z]*it\|\.ref\|\)\.text)/*(\1.literal \1.text)/g' \
|
||||
-e 's/\.text\.unlikely/.literal.unlikely .text.unlikely/g' \
|
||||
-e 's/\*(\(\.text\.[a-z]*\))/*(\1.literal \1)/g'
|
||||
|
||||
quiet_cmd__cpp_lds_S = LDS $@
|
||||
|
|
|
|||
|
|
@ -1,75 +0,0 @@
|
|||
/*
|
||||
* arch/xtensa/io.c
|
||||
*
|
||||
* IO primitives
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Copied from sparc.
|
||||
*
|
||||
* Chris Zankel <chris@zankel.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
void outsb(unsigned long addr, const void *src, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 1;
|
||||
writeb(*(const char *)src, addr);
|
||||
src += 1;
|
||||
addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void outsw(unsigned long addr, const void *src, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 2;
|
||||
writew(*(const short *)src, addr);
|
||||
src += 2;
|
||||
addr += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void outsl(unsigned long addr, const void *src, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 4;
|
||||
writel(*(const long *)src, addr);
|
||||
src += 4;
|
||||
addr += 4;
|
||||
}
|
||||
}
|
||||
|
||||
void insb(unsigned long addr, void *dst, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 1;
|
||||
*(unsigned char *)dst = readb(addr);
|
||||
dst += 1;
|
||||
addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void insw(unsigned long addr, void *dst, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 2;
|
||||
*(unsigned short *)dst = readw(addr);
|
||||
dst += 2;
|
||||
addr += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void insl(unsigned long addr, void *dst, unsigned long count) {
|
||||
while (count) {
|
||||
count -= 4;
|
||||
/*
|
||||
* XXX I am sure we are in for an unaligned trap here.
|
||||
*/
|
||||
*(unsigned long *)dst = readl(addr);
|
||||
dst += 4;
|
||||
addr += 4;
|
||||
}
|
||||
}
|
||||
|
|
@ -84,12 +84,12 @@ static void xtensa_irq_unmask(struct irq_data *d)
|
|||
static void xtensa_irq_enable(struct irq_data *d)
|
||||
{
|
||||
variant_irq_enable(d->irq);
|
||||
xtensa_irq_unmask(d->irq);
|
||||
xtensa_irq_unmask(d);
|
||||
}
|
||||
|
||||
static void xtensa_irq_disable(struct irq_data *d)
|
||||
{
|
||||
xtensa_irq_mask(d->irq);
|
||||
xtensa_irq_mask(d);
|
||||
variant_irq_disable(d->irq);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/string.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/gfp.h>
|
||||
#include <linux/module.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
|
|
@ -62,6 +63,7 @@ dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
|
|||
|
||||
return (void*)uncached;
|
||||
}
|
||||
EXPORT_SYMBOL(dma_alloc_coherent);
|
||||
|
||||
void dma_free_coherent(struct device *hwdev, size_t size,
|
||||
void *vaddr, dma_addr_t dma_handle)
|
||||
|
|
@ -73,6 +75,7 @@ void dma_free_coherent(struct device *hwdev, size_t size,
|
|||
|
||||
free_pages(addr, get_order(size));
|
||||
}
|
||||
EXPORT_SYMBOL(dma_free_coherent);
|
||||
|
||||
|
||||
void consistent_sync(void *vaddr, size_t size, int direction)
|
||||
|
|
@ -92,3 +95,4 @@ void consistent_sync(void *vaddr, size_t size, int direction)
|
|||
break;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(consistent_sync);
|
||||
|
|
|
|||
|
|
@ -333,7 +333,7 @@ __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
|
|||
int prot = pgprot_val(vma->vm_page_prot);
|
||||
|
||||
/* Set to write-through */
|
||||
prot &= ~_PAGE_NO_CACHE;
|
||||
prot = (prot & _PAGE_CA_MASK) | _PAGE_CA_WT;
|
||||
#if 0
|
||||
if (!write_combine)
|
||||
prot |= _PAGE_WRITETHRU;
|
||||
|
|
|
|||
|
|
@ -40,8 +40,8 @@ _F(int, pcibios_fixup, (void), { return 0; });
|
|||
#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
|
||||
_F(void, calibrate_ccount, (void),
|
||||
{
|
||||
printk ("ERROR: Cannot calibrate cpu frequency! Assuming 100MHz.\n");
|
||||
ccount_per_jiffy = 100 * (1000000UL/HZ);
|
||||
pr_err("ERROR: Cannot calibrate cpu frequency! Assuming 10MHz.\n");
|
||||
ccount_per_jiffy = 10 * (1000000UL/HZ);
|
||||
});
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -60,8 +60,6 @@ struct rtc_ops *rtc_ops;
|
|||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
extern void *initrd_start;
|
||||
extern void *initrd_end;
|
||||
extern void *__initrd_start;
|
||||
extern void *__initrd_end;
|
||||
int initrd_is_mapped = 0;
|
||||
extern int initrd_below_start_ok;
|
||||
#endif
|
||||
|
|
@ -79,10 +77,6 @@ static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
|
|||
|
||||
sysmem_info_t __initdata sysmem;
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
int initrd_is_mapped;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
extern void init_mmu(void);
|
||||
#else
|
||||
|
|
@ -197,12 +191,6 @@ static int __init parse_bootparam(const bp_tag_t* tag)
|
|||
|
||||
void __init init_arch(bp_tag_t *bp_start)
|
||||
{
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
initrd_start = &__initrd_start;
|
||||
initrd_end = &__initrd_end;
|
||||
#endif
|
||||
|
||||
sysmem.nr_banks = 0;
|
||||
|
||||
#ifdef CONFIG_CMDLINE_BOOL
|
||||
|
|
|
|||
|
|
@ -222,11 +222,6 @@ SECTIONS
|
|||
. = ALIGN(0x10);
|
||||
.bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }
|
||||
|
||||
. = ALIGN(0x1000);
|
||||
__initrd_start = .;
|
||||
.initrd : { *(.initrd) }
|
||||
__initrd_end = .;
|
||||
|
||||
.ResetVector.text XCHAL_RESET_VECTOR_VADDR :
|
||||
{
|
||||
*(.ResetVector.text)
|
||||
|
|
|
|||
|
|
@ -39,8 +39,12 @@
|
|||
EXPORT_SYMBOL(memset);
|
||||
EXPORT_SYMBOL(memcpy);
|
||||
EXPORT_SYMBOL(memmove);
|
||||
EXPORT_SYMBOL(__strncpy_user);
|
||||
EXPORT_SYMBOL(clear_page);
|
||||
EXPORT_SYMBOL(copy_page);
|
||||
|
||||
EXPORT_SYMBOL(kernel_thread);
|
||||
EXPORT_SYMBOL(empty_zero_page);
|
||||
|
||||
/*
|
||||
* gcc internal math functions
|
||||
|
|
@ -56,6 +60,7 @@ extern unsigned int __udivsi3(unsigned int, unsigned int);
|
|||
extern unsigned int __umodsi3(unsigned int, unsigned int);
|
||||
extern unsigned long long __umoddi3(unsigned long long, unsigned long long);
|
||||
extern unsigned long long __udivdi3(unsigned long long, unsigned long long);
|
||||
extern int __ucmpdi2(int, int);
|
||||
|
||||
EXPORT_SYMBOL(__ashldi3);
|
||||
EXPORT_SYMBOL(__ashrdi3);
|
||||
|
|
@ -68,11 +73,31 @@ EXPORT_SYMBOL(__udivsi3);
|
|||
EXPORT_SYMBOL(__umodsi3);
|
||||
EXPORT_SYMBOL(__udivdi3);
|
||||
EXPORT_SYMBOL(__umoddi3);
|
||||
EXPORT_SYMBOL(__ucmpdi2);
|
||||
|
||||
void __xtensa_libgcc_window_spill(void)
|
||||
{
|
||||
BUG();
|
||||
}
|
||||
EXPORT_SYMBOL(__xtensa_libgcc_window_spill);
|
||||
|
||||
unsigned long __sync_fetch_and_and_4(unsigned long *p, unsigned long v)
|
||||
{
|
||||
BUG();
|
||||
}
|
||||
EXPORT_SYMBOL(__sync_fetch_and_and_4);
|
||||
|
||||
unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v)
|
||||
{
|
||||
BUG();
|
||||
}
|
||||
EXPORT_SYMBOL(__sync_fetch_and_or_4);
|
||||
|
||||
#ifdef CONFIG_NET
|
||||
/*
|
||||
* Networking support
|
||||
*/
|
||||
EXPORT_SYMBOL(csum_partial);
|
||||
EXPORT_SYMBOL(csum_partial_copy_generic);
|
||||
#endif /* CONFIG_NET */
|
||||
|
||||
|
|
|
|||
|
|
@ -4,5 +4,5 @@
|
|||
# "prom monitor" library routines under Linux.
|
||||
#
|
||||
|
||||
obj-y = io.o console.o setup.o network.o
|
||||
|
||||
obj-y = console.o setup.o
|
||||
obj-$(CONFIG_NET) += network.o
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@
|
|||
#endif
|
||||
|
||||
#define SERIAL_MAX_NUM_LINES 1
|
||||
#define SERIAL_TIMER_VALUE (20 * HZ)
|
||||
#define SERIAL_TIMER_VALUE (HZ / 10)
|
||||
|
||||
static struct tty_driver *serial_driver;
|
||||
static struct tty_port serial_port;
|
||||
|
|
@ -41,19 +41,6 @@ static struct timer_list serial_timer;
|
|||
|
||||
static DEFINE_SPINLOCK(timer_lock);
|
||||
|
||||
int errno;
|
||||
|
||||
static int __simc (int a, int b, int c, int d, int e, int f) __attribute__((__noinline__));
|
||||
static int __simc (int a, int b, int c, int d, int e, int f)
|
||||
{
|
||||
int ret;
|
||||
__asm__ __volatile__ ("simcall\n"
|
||||
"mov %0, a2\n"
|
||||
"mov %1, a3\n" : "=a" (ret), "=a" (errno)
|
||||
: : "a2", "a3");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static char *serial_version = "0.1";
|
||||
static char *serial_name = "ISS serial driver";
|
||||
|
||||
|
|
|
|||
|
|
@ -57,6 +57,59 @@
|
|||
#define XTISS_SELECT_ONE_WRITE 2
|
||||
#define XTISS_SELECT_ONE_EXCEPT 3
|
||||
|
||||
static int errno;
|
||||
|
||||
static inline int __simc(int a, int b, int c, int d, int e, int f)
|
||||
{
|
||||
int ret;
|
||||
register int a1 asm("a2") = a;
|
||||
register int b1 asm("a3") = b;
|
||||
register int c1 asm("a4") = c;
|
||||
register int d1 asm("a5") = d;
|
||||
register int e1 asm("a6") = e;
|
||||
register int f1 asm("a7") = f;
|
||||
__asm__ __volatile__ (
|
||||
"simcall\n"
|
||||
"mov %0, a2\n"
|
||||
"mov %1, a3\n"
|
||||
: "=a" (ret), "=a" (errno), "+r"(a1), "+r"(b1)
|
||||
: "r"(c1), "r"(d1), "r"(e1), "r"(f1)
|
||||
: );
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int simc_open(char *file, int flags, int mode)
|
||||
{
|
||||
return __simc(SYS_open, (int) file, flags, mode, 0, 0);
|
||||
}
|
||||
|
||||
static inline int simc_close(int fd)
|
||||
{
|
||||
return __simc(SYS_close, fd, 0, 0, 0, 0);
|
||||
}
|
||||
|
||||
static inline int simc_ioctl(int fd, int request, void *arg)
|
||||
{
|
||||
return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0);
|
||||
}
|
||||
|
||||
static inline int simc_read(int fd, void *buf, size_t count)
|
||||
{
|
||||
return __simc(SYS_read, fd, (int) buf, count, 0, 0);
|
||||
}
|
||||
|
||||
static inline int simc_write(int fd, void *buf, size_t count)
|
||||
{
|
||||
return __simc(SYS_write, fd, (int) buf, count, 0, 0);
|
||||
}
|
||||
|
||||
static inline int simc_poll(int fd)
|
||||
{
|
||||
struct timeval tv = { .tv_sec = 0, .tv_usec = 0 };
|
||||
|
||||
return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv,
|
||||
0, 0);
|
||||
}
|
||||
|
||||
#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,32 +0,0 @@
|
|||
/* This file isn't really needed right now. */
|
||||
|
||||
#if 0
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <platform/platform-iss/simcall.h>
|
||||
|
||||
extern int __simc ();
|
||||
|
||||
|
||||
char iss_serial_getc()
|
||||
{
|
||||
char c;
|
||||
__simc( SYS_read, 0, &c, 1 );
|
||||
return c;
|
||||
}
|
||||
|
||||
void iss_serial_putc( char c )
|
||||
{
|
||||
__simc( SYS_write, 1, &c, 1 );
|
||||
}
|
||||
|
||||
void iss_serial_puts( char *s )
|
||||
{
|
||||
if( s != 0 && *s != 0 )
|
||||
__simc( SYS_write, 1, s, strlen(s) );
|
||||
}
|
||||
|
||||
/*#error Need I/O ports to specific hardware!*/
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -101,55 +101,6 @@ struct iss_net_private {
|
|||
|
||||
};
|
||||
|
||||
/* ======================= ISS SIMCALL INTERFACE =========================== */
|
||||
|
||||
/* Note: __simc must _not_ be declared inline! */
|
||||
|
||||
static int errno;
|
||||
|
||||
static int __simc (int a, int b, int c, int d, int e, int f) __attribute__((__noinline__));
|
||||
static int __simc (int a, int b, int c, int d, int e, int f)
|
||||
{
|
||||
int ret;
|
||||
__asm__ __volatile__ ("simcall\n"
|
||||
"mov %0, a2\n"
|
||||
"mov %1, a3\n" : "=a" (ret), "=a" (errno)
|
||||
: : "a2", "a3");
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int inline simc_open(char *file, int flags, int mode)
|
||||
{
|
||||
return __simc(SYS_open, (int) file, flags, mode, 0, 0);
|
||||
}
|
||||
|
||||
static int inline simc_close(int fd)
|
||||
{
|
||||
return __simc(SYS_close, fd, 0, 0, 0, 0);
|
||||
}
|
||||
|
||||
static int inline simc_ioctl(int fd, int request, void *arg)
|
||||
{
|
||||
return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0);
|
||||
}
|
||||
|
||||
static int inline simc_read(int fd, void *buf, size_t count)
|
||||
{
|
||||
return __simc(SYS_read, fd, (int) buf, count, 0, 0);
|
||||
}
|
||||
|
||||
static int inline simc_write(int fd, void *buf, size_t count)
|
||||
{
|
||||
return __simc(SYS_write, fd, (int) buf, count, 0, 0);
|
||||
}
|
||||
|
||||
static int inline simc_poll(int fd)
|
||||
{
|
||||
struct timeval tv = { .tv_sec = 0, .tv_usec = 0 };
|
||||
|
||||
return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv,0,0);
|
||||
}
|
||||
|
||||
/* ================================ HELPERS ================================ */
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -38,16 +38,22 @@ void __init platform_init(bp_tag_t* bootparam)
|
|||
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
void platform_pcibios_init(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
void platform_halt(void)
|
||||
{
|
||||
printk (" ** Called platform_halt(), looping forever! **\n");
|
||||
while (1);
|
||||
pr_info(" ** Called platform_halt() **\n");
|
||||
__asm__ __volatile__("movi a2, 1\nsimcall\n");
|
||||
}
|
||||
|
||||
void platform_power_off(void)
|
||||
{
|
||||
printk (" ** Called platform_power_off(), looping forever! **\n");
|
||||
while (1);
|
||||
pr_info(" ** Called platform_power_off() **\n");
|
||||
__asm__ __volatile__("movi a2, 1\nsimcall\n");
|
||||
}
|
||||
void platform_restart(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -109,7 +109,7 @@ config HISAX_16_3
|
|||
|
||||
config HISAX_TELESPCI
|
||||
bool "Teles PCI"
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV))
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN)))
|
||||
help
|
||||
This enables HiSax support for the Teles PCI.
|
||||
See <file:Documentation/isdn/README.HiSax> on how to configure it.
|
||||
|
|
@ -237,7 +237,7 @@ config HISAX_MIC
|
|||
|
||||
config HISAX_NETJET
|
||||
bool "NETjet card"
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV))
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN)))
|
||||
help
|
||||
This enables HiSax support for the NetJet from Traverse
|
||||
Technologies.
|
||||
|
|
@ -248,7 +248,7 @@ config HISAX_NETJET
|
|||
|
||||
config HISAX_NETJET_U
|
||||
bool "NETspider U card"
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV))
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN)))
|
||||
help
|
||||
This enables HiSax support for the Netspider U interface ISDN card
|
||||
from Traverse Technologies.
|
||||
|
|
@ -316,7 +316,7 @@ config HISAX_GAZEL
|
|||
|
||||
config HISAX_HFC_PCI
|
||||
bool "HFC PCI-Bus cards"
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV))
|
||||
depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN)))
|
||||
help
|
||||
This enables HiSax support for the HFC-S PCI 2BDS0 based cards.
|
||||
|
||||
|
|
@ -341,7 +341,7 @@ config HISAX_HFC_SX
|
|||
|
||||
config HISAX_ENTERNOW_PCI
|
||||
bool "Formula-n enter:now PCI card"
|
||||
depends on HISAX_NETJET && PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV))
|
||||
depends on HISAX_NETJET && PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN)))
|
||||
help
|
||||
This enables HiSax support for the Formula-n enter:now PCI
|
||||
ISDN card.
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ if PARPORT
|
|||
config PARPORT_PC
|
||||
tristate "PC-style hardware"
|
||||
depends on (!SPARC64 || PCI) && !SPARC32 && !M32R && !FRV && \
|
||||
(!M68K || ISA) && !MN10300 && !AVR32 && !BLACKFIN
|
||||
(!M68K || ISA) && !MN10300 && !AVR32 && !BLACKFIN && !XTENSA
|
||||
---help---
|
||||
You should say Y here if you have a PC-style parallel port. All
|
||||
IBM PC compatible computers and some Alphas have PC-style
|
||||
|
|
|
|||
|
|
@ -40,7 +40,8 @@
|
|||
#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \
|
||||
&& !defined(CONFIG_AVR32) && !defined(CONFIG_PPC32) \
|
||||
&& !defined(CONFIG_PPC64) && !defined(CONFIG_BLACKFIN) \
|
||||
&& !defined(CONFIG_MIPS) && !defined(CONFIG_M68K)
|
||||
&& !defined(CONFIG_MIPS) && !defined(CONFIG_M68K) \
|
||||
&& !defined(CONFIG_XTENSA)
|
||||
static inline void readsl(const void __iomem *addr, void *buf, int len)
|
||||
{ insl((unsigned long)addr, buf, len); }
|
||||
static inline void readsw(const void __iomem *addr, void *buf, int len)
|
||||
|
|
|
|||
|
|
@ -827,6 +827,8 @@ static const char *section_white_list[] =
|
|||
".note*",
|
||||
".got*",
|
||||
".toc*",
|
||||
".xt.prop", /* xtensa */
|
||||
".xt.lit", /* xtensa */
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue