diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 13a6b4afb4b3..30cecddda6ed 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -852,6 +852,15 @@ config SENSORS_MAX1668 This driver can also be built as a module. If so, the module will be called max1668. +config SENSORS_MAX17135 + tristate "Maxim MAX17135 EPD temperature sensor" + depends on I2C + help + If you say yes here you get support for MAX17135 PMIC sensor. + + This driver can also be built as a module. If so, the module + will be called max17135_sensor. + config SENSORS_MAX197 tristate "Maxim MAX197 and compatibles" help @@ -1593,7 +1602,7 @@ config SENSORS_ADS7871 config SENSORS_AMC6821 tristate "Texas Instruments AMC6821" - depends on I2C + depends on I2C help If you say yes here you get support for the Texas Instruments AMC6821 hardware monitoring chips. diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 40c036ea45e6..3045950a2f91 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -118,6 +118,7 @@ obj-$(CONFIG_SENSORS_MAX1111) += max1111.o obj-$(CONFIG_SENSORS_MAX16065) += max16065.o obj-$(CONFIG_SENSORS_MAX1619) += max1619.o obj-$(CONFIG_SENSORS_MAX1668) += max1668.o +obj-$(CONFIG_SENSORS_MAX17135) += max17135-hwmon.o obj-$(CONFIG_SENSORS_MAX197) += max197.o obj-$(CONFIG_SENSORS_MAX31722) += max31722.o obj-$(CONFIG_SENSORS_MAX6621) += max6621.o diff --git a/drivers/hwmon/max17135-hwmon.c b/drivers/hwmon/max17135-hwmon.c new file mode 100644 index 000000000000..0cddef54ada2 --- /dev/null +++ b/drivers/hwmon/max17135-hwmon.c @@ -0,0 +1,163 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. + * Copyright 2019 NXP + */ +/* + * max17135.c + * + * Based on the MAX1619 driver. + * Copyright (C) 2003-2004 Alexey Fisher + * Jean Delvare + * + * The MAX17135 is a sensor chip made by Maxim. + * It reports up to two temperatures (its own plus up to + * one external one). + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Conversions + */ +static int temp_from_reg(int val) +{ + return val >> 8; +} + +/* + * Functions declaration + */ +static int max17135_sensor_probe(struct platform_device *pdev); +static int max17135_sensor_remove(struct platform_device *pdev); + +static const struct platform_device_id max17135_sns_id[] = { + { "max17135-sns", 0}, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(platform, max17135_sns_id); + +/* + * Driver data (common to all clients) + */ +static struct platform_driver max17135_sensor_driver = { + .probe = max17135_sensor_probe, + .remove = max17135_sensor_remove, + .id_table = max17135_sns_id, + .driver = { + .name = "max17135_sensor", + }, +}; + +/* + * Client data (each client gets its own) + */ +struct max17135_data { + struct device *hwmon_dev; +}; + +/* + * Sysfs stuff + */ +static ssize_t show_temp_input1(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned int reg_val; + max17135_reg_read(REG_MAX17135_INT_TEMP, ®_val); + return snprintf(buf, PAGE_SIZE, "%d\n", temp_from_reg(reg_val)); +} + +static ssize_t show_temp_input2(struct device *dev, + struct device_attribute *attr, char *buf) +{ + unsigned int reg_val; + max17135_reg_read(REG_MAX17135_EXT_TEMP, ®_val); + return snprintf(buf, PAGE_SIZE, "%d\n", temp_from_reg(reg_val)); +} + +static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp_input1, NULL); +static DEVICE_ATTR(temp2_input, S_IRUGO, show_temp_input2, NULL); + +static struct attribute *max17135_attributes[] = { + &dev_attr_temp1_input.attr, + &dev_attr_temp2_input.attr, + NULL +}; + +static const struct attribute_group max17135_group = { + .attrs = max17135_attributes, +}; + +/* + * Real code + */ +static int max17135_sensor_probe(struct platform_device *pdev) +{ + struct max17135_data *data; + int err; + + data = kzalloc(sizeof(struct max17135_data), GFP_KERNEL); + if (!data) { + err = -ENOMEM; + goto exit; + } + + /* Register sysfs hooks */ + err = sysfs_create_group(&pdev->dev.kobj, &max17135_group); + if (err) + goto exit_free; + + data->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(data->hwmon_dev)) { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove_files; + } + + platform_set_drvdata(pdev, data); + + return 0; + +exit_remove_files: + sysfs_remove_group(&pdev->dev.kobj, &max17135_group); +exit_free: + kfree(data); +exit: + return err; +} + +static int max17135_sensor_remove(struct platform_device *pdev) +{ + struct max17135_data *data = platform_get_drvdata(pdev); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&pdev->dev.kobj, &max17135_group); + + kfree(data); + return 0; +} + +static int __init sensors_max17135_init(void) +{ + return platform_driver_register(&max17135_sensor_driver); +} +module_init(sensors_max17135_init); + +static void __exit sensors_max17135_exit(void) +{ + platform_driver_unregister(&max17135_sensor_driver); +} +module_exit(sensors_max17135_exit); + +MODULE_DESCRIPTION("MAX17135 sensor driver"); +MODULE_LICENSE("GPL"); + diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ae24d3ea68ea..01547046417b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -737,6 +737,14 @@ config MFD_MAX14577 additional drivers must be enabled in order to use the functionality of the device. +config MFD_MAX17135 + tristate "Maxim MAX17135 EPD PMIC core" + depends on I2C + + help + This is the MAX17135 PMIC support. It includes + core support for communication with the MAX17135 chip. + config MFD_MAX77620 bool "Maxim Semiconductor MAX77620 and MAX20024 PMIC Support" depends on I2C=y diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c1067ea46204..96f5c5c262a9 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -158,6 +158,7 @@ obj-$(CONFIG_MFD_DA9063) += da9063.o obj-$(CONFIG_MFD_DA9150) += da9150-core.o obj-$(CONFIG_MFD_MAX14577) += max14577.o +obj-$(CONFIG_MFD_MAX17135) += max17135-core.o obj-$(CONFIG_MFD_MAX77620) += max77620.o obj-$(CONFIG_MFD_MAX77650) += max77650.o obj-$(CONFIG_MFD_MAX77686) += max77686.o diff --git a/drivers/mfd/max17135-core.c b/drivers/mfd/max17135-core.c new file mode 100644 index 000000000000..03773ec6f931 --- /dev/null +++ b/drivers/mfd/max17135-core.c @@ -0,0 +1,270 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. + * Copyright 2019 NXP + */ + +/*! + * @file pmic/core/max17135.c + * @brief This file contains MAX17135 specific PMIC code. This implementaion + * may differ for each PMIC chip. + * + * @ingroup PMIC_CORE + */ + +/* + * Includes + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int max17135_detect(struct i2c_client *client, + struct i2c_board_info *info); +struct i2c_client *max17135_client; +static struct regulator *gpio_regulator; + +static struct mfd_cell max17135_devs[] = { + { .name = "max17135-pmic", }, + { .name = "max17135-sns", }, +}; + +static const unsigned short normal_i2c[] = {0x48, I2C_CLIENT_END}; + +int max17135_reg_read(int reg_num, unsigned int *reg_val) +{ + int result; + + if (max17135_client == NULL) + return PMIC_ERROR; + + if ((reg_num == REG_MAX17135_EXT_TEMP) || + (reg_num == REG_MAX17135_INT_TEMP)) { + result = i2c_smbus_read_word_data(max17135_client, reg_num); + if (result < 0) { + dev_err(&max17135_client->dev, + "Unable to read MAX17135 register via I2C\n"); + return PMIC_ERROR; + } + /* Swap bytes for dword read */ + result = (result >> 8) | ((result & 0xFF) << 8); + } else { + result = i2c_smbus_read_byte_data(max17135_client, reg_num); + if (result < 0) { + dev_err(&max17135_client->dev, + "Unable to read MAX17135 register via I2C\n"); + return PMIC_ERROR; + } + } + + *reg_val = result; + return PMIC_SUCCESS; +} + +int max17135_reg_write(int reg_num, const unsigned int reg_val) +{ + int result; + + if (max17135_client == NULL) + return PMIC_ERROR; + + result = i2c_smbus_write_byte_data(max17135_client, reg_num, reg_val); + if (result < 0) { + dev_err(&max17135_client->dev, + "Unable to write MAX17135 register via I2C\n"); + return PMIC_ERROR; + } + + return PMIC_SUCCESS; +} + +#ifdef CONFIG_OF +static struct max17135_platform_data *max17135_i2c_parse_dt_pdata( + struct device *dev) +{ + struct max17135_platform_data *pdata; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) { + dev_err(dev, "could not allocate memory for pdata\n"); + return ERR_PTR(-ENOMEM); + } + + return pdata; +} +#else +static struct max17135_platform_data *max17135_i2c_parse_dt_pdata( + struct device *dev) +{ + return NULL; +} +#endif /* !CONFIG_OF */ + +static int max17135_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct max17135 *max17135; + struct max17135_platform_data *pdata = client->dev.platform_data; + struct device_node *np = client->dev.of_node; + int ret = 0; + + if (!np) + return -ENODEV; + + gpio_regulator = devm_regulator_get(&client->dev, "SENSOR"); + if (!IS_ERR(gpio_regulator)) { + ret = regulator_enable(gpio_regulator); + if (ret) { + dev_err(&client->dev, "gpio set voltage error\n"); + return ret; + } + } + + /* Create the PMIC data structure */ + max17135 = kzalloc(sizeof(struct max17135), GFP_KERNEL); + if (max17135 == NULL) { + kfree(client); + return -ENOMEM; + } + + /* Initialize the PMIC data structure */ + i2c_set_clientdata(client, max17135); + max17135->dev = &client->dev; + max17135->i2c_client = client; + + max17135_client = client; + ret = max17135_detect(client, NULL); + if (ret) + goto err1; + + mfd_add_devices(max17135->dev, -1, max17135_devs, + ARRAY_SIZE(max17135_devs), + NULL, 0, NULL); + + if (max17135->dev->of_node) { + pdata = max17135_i2c_parse_dt_pdata(max17135->dev); + if (IS_ERR(pdata)) { + ret = PTR_ERR(pdata); + goto err2; + } + + } + max17135->pdata = pdata; + + dev_info(&client->dev, "PMIC MAX17135 for eInk display\n"); + + return ret; +err2: + mfd_remove_devices(max17135->dev); +err1: + kfree(max17135); + + return ret; +} + + +static int max17135_remove(struct i2c_client *i2c) +{ + struct max17135 *max17135 = i2c_get_clientdata(i2c); + + mfd_remove_devices(max17135->dev); + return 0; +} + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int max17135_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + u8 chip_rev, chip_id; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + /* detection */ + if (i2c_smbus_read_byte_data(client, + REG_MAX17135_PRODUCT_REV) != 0) { + dev_err(&adapter->dev, + "Max17135 PMIC not found!\n"); + return -ENODEV; + } + + /* identification */ + chip_rev = i2c_smbus_read_byte_data(client, + REG_MAX17135_PRODUCT_REV); + chip_id = i2c_smbus_read_byte_data(client, + REG_MAX17135_PRODUCT_ID); + + if (chip_rev != 0x00 || chip_id != 0x4D) { /* identification failed */ + dev_info(&adapter->dev, + "Unsupported chip (man_id=0x%02X, " + "chip_id=0x%02X).\n", chip_rev, chip_id); + return -ENODEV; + } + + if (info) + strlcpy(info->type, "max17135_sensor", I2C_NAME_SIZE); + + return 0; +} + +static const struct i2c_device_id max17135_id[] = { + { "max17135", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max17135_id); + +static const struct of_device_id max17135_dt_ids[] = { + { + .compatible = "maxim,max17135", + .data = (void *) &max17135_id[0], + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, max17135_dt_ids); + + +static struct i2c_driver max17135_driver = { + .driver = { + .name = "max17135", + .owner = THIS_MODULE, + .of_match_table = max17135_dt_ids, + }, + .probe = max17135_probe, + .remove = max17135_remove, + .id_table = max17135_id, + .detect = max17135_detect, + .address_list = &normal_i2c[0], +}; + +static int __init max17135_init(void) +{ + return i2c_add_driver(&max17135_driver); +} + +static void __exit max17135_exit(void) +{ + i2c_del_driver(&max17135_driver); +} + +/* + * Module entry points + */ +subsys_initcall(max17135_init); +module_exit(max17135_exit); diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index ee7bae70fd21..59c363f65dc0 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -463,6 +463,10 @@ config REGULATOR_MAX1586 regulator via I2C bus. The provided regulator is suitable for PXA27x chips to control VCC_CORE and VCC_USIM voltages. +config REGULATOR_MAX17135 + tristate "Maxim MAX17135 Regulator Support" + depends on MFD_MAX17135 + config REGULATOR_MAX77620 tristate "Maxim 77620/MAX20024 voltage regulator" depends on MFD_MAX77620 diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index b90e43d9ea79..c70cf3ad2425 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -60,6 +60,7 @@ obj-$(CONFIG_REGULATOR_LTC3589) += ltc3589.o obj-$(CONFIG_REGULATOR_LTC3676) += ltc3676.o obj-$(CONFIG_REGULATOR_MAX14577) += max14577-regulator.o obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o +obj-$(CONFIG_REGULATOR_MAX17135) += max17135-regulator.o obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o obj-$(CONFIG_REGULATOR_MAX77650) += max77650-regulator.o obj-$(CONFIG_REGULATOR_MAX8649) += max8649.o diff --git a/drivers/regulator/max17135-regulator.c b/drivers/regulator/max17135-regulator.c new file mode 100644 index 000000000000..6e36c12d7afe --- /dev/null +++ b/drivers/regulator/max17135-regulator.c @@ -0,0 +1,827 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2019 NXP + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Regulator definitions + * *_MIN_uV - minimum microvolt for regulator + * *_MAX_uV - maximum microvolt for regulator + * *_STEP_uV - microvolts between regulator output levels + * *_MIN_VAL - minimum register field value for regulator + * *_MAX_VAL - maximum register field value for regulator + */ +#define MAX17135_HVINP_MIN_uV 5000000 +#define MAX17135_HVINP_MAX_uV 20000000 +#define MAX17135_HVINP_STEP_uV 1000000 +#define MAX17135_HVINP_MIN_VAL 0 +#define MAX17135_HVINP_MAX_VAL 12 + +#define MAX17135_HVINN_MIN_uV 5000000 +#define MAX17135_HVINN_MAX_uV 20000000 +#define MAX17135_HVINN_STEP_uV 1000000 +#define MAX17135_HVINN_MIN_VAL 0 +#define MAX17135_HVINN_MAX_VAL 1 + +#define MAX17135_GVDD_MIN_uV 5000000 +#define MAX17135_GVDD_MAX_uV 20000000 +#define MAX17135_GVDD_STEP_uV 1000000 +#define MAX17135_GVDD_MIN_VAL 0 +#define MAX17135_GVDD_MAX_VAL 1 + +#define MAX17135_GVEE_MIN_uV 5000000 +#define MAX17135_GVEE_MAX_uV 20000000 +#define MAX17135_GVEE_STEP_uV 1000000 +#define MAX17135_GVEE_MIN_VAL 0 +#define MAX17135_GVEE_MAX_VAL 1 + +#define MAX17135_VCOM_MIN_VAL 0 +#define MAX17135_VCOM_MAX_VAL 255 + +#define MAX17135_VNEG_MIN_uV 5000000 +#define MAX17135_VNEG_MAX_uV 20000000 +#define MAX17135_VNEG_STEP_uV 1000000 +#define MAX17135_VNEG_MIN_VAL 0 +#define MAX17135_VNEG_MAX_VAL 1 + +#define MAX17135_VPOS_MIN_uV 5000000 +#define MAX17135_VPOS_MAX_uV 20000000 +#define MAX17135_VPOS_STEP_uV 1000000 +#define MAX17135_VPOS_MIN_VAL 0 +#define MAX17135_VPOS_MAX_VAL 1 + +struct max17135_vcom_programming_data { + int vcom_min_uV; + int vcom_max_uV; + int vcom_step_uV; +}; + +struct max17135_data { + int num_regulators; + struct max17135 *max17135; + struct regulator_dev **rdev; +}; + +static long unsigned int max17135_pass_num = { 1 }; +static int max17135_vcom = { -1250000 }; + +struct max17135_vcom_programming_data vcom_data[2] = { + { + -4325000, + -500000, + 15000, + }, + { + -3050000, + -500000, + 10000, + }, +}; + +static int max17135_is_power_good(struct max17135 *max17135); + +/* + * Regulator operations + */ +static int max17135_hvinp_set_voltage(struct regulator_dev *reg, + int minuV, int uV, unsigned *selector) +{ + unsigned int reg_val; + unsigned int fld_val; + + if ((uV >= MAX17135_HVINP_MIN_uV) && + (uV <= MAX17135_HVINP_MAX_uV)) + fld_val = (uV - MAX17135_HVINP_MIN_uV) / + MAX17135_HVINP_STEP_uV; + else + return -EINVAL; + + max17135_reg_read(REG_MAX17135_HVINP, ®_val); + + reg_val &= ~BITFMASK(HVINP); + reg_val |= BITFVAL(HVINP, fld_val); /* shift to correct bit */ + + return max17135_reg_write(REG_MAX17135_HVINP, reg_val); +} + +static int max17135_hvinp_get_voltage(struct regulator_dev *reg) +{ + unsigned int reg_val; + unsigned int fld_val; + int volt; + + max17135_reg_read(REG_MAX17135_HVINP, ®_val); + + fld_val = (reg_val & BITFMASK(HVINP)) >> HVINP_LSH; + + if ((fld_val >= MAX17135_HVINP_MIN_VAL) && + (fld_val <= MAX17135_HVINP_MAX_VAL)) { + volt = (fld_val * MAX17135_HVINP_STEP_uV) + + MAX17135_HVINP_MIN_uV; + } else { + printk(KERN_ERR "MAX17135: HVINP voltage is out of range\n"); + volt = 0; + } + return volt; +} + +static int max17135_hvinp_enable(struct regulator_dev *reg) +{ + return 0; +} + +static int max17135_hvinp_disable(struct regulator_dev *reg) +{ + return 0; +} + +/* Convert uV to the VCOM register bitfield setting */ +static inline int vcom_uV_to_rs(int uV, int pass_num) +{ + return (vcom_data[pass_num].vcom_max_uV - uV) + / vcom_data[pass_num].vcom_step_uV; +} + +/* Convert the VCOM register bitfield setting to uV */ +static inline int vcom_rs_to_uV(int rs, int pass_num) +{ + return vcom_data[pass_num].vcom_max_uV + - (vcom_data[pass_num].vcom_step_uV * rs); +} + +static int max17135_vcom_set_voltage(struct regulator_dev *reg, + int minuV, int uV, unsigned *selector) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + unsigned int reg_val; + int vcom_read; + + if ((uV < vcom_data[max17135->pass_num-1].vcom_min_uV) + || (uV > vcom_data[max17135->pass_num-1].vcom_max_uV)) + return -EINVAL; + + max17135_reg_read(REG_MAX17135_DVR, ®_val); + + /* + * Only program VCOM if it is not set to the desired value. + * Programming VCOM excessively degrades ability to keep + * DVR register value persistent. + */ + vcom_read = vcom_rs_to_uV(reg_val, max17135->pass_num-1); + if (vcom_read != max17135->vcom_uV) { + reg_val &= ~BITFMASK(DVR); + reg_val |= BITFVAL(DVR, vcom_uV_to_rs(uV, + max17135->pass_num-1)); + max17135_reg_write(REG_MAX17135_DVR, reg_val); + + reg_val = BITFVAL(CTRL_DVR, true); /* shift to correct bit */ + return max17135_reg_write(REG_MAX17135_PRGM_CTRL, reg_val); + } + + return 0; +} + +static int max17135_vcom_get_voltage(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + unsigned int reg_val; + + max17135_reg_read(REG_MAX17135_DVR, ®_val); + return vcom_rs_to_uV(BITFEXT(reg_val, DVR), max17135->pass_num-1); +} + +static int max17135_vcom_enable(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + /* + * Check to see if we need to set the VCOM voltage. + * Should only be done one time. And, we can + * only change vcom voltage if we have been enabled. + */ + if (!max17135->vcom_setup && max17135_is_power_good(max17135)) { + max17135_vcom_set_voltage(reg, + max17135->vcom_uV, + max17135->vcom_uV, + NULL); + max17135->vcom_setup = true; + } + + /* enable VCOM regulator output */ + if (max17135->pass_num == 1) + gpio_set_value(max17135->gpio_pmic_vcom_ctrl, 1); + else { + unsigned int reg_val; + + max17135_reg_read(REG_MAX17135_ENABLE, ®_val); + reg_val &= ~BITFMASK(VCOM_ENABLE); + reg_val |= BITFVAL(VCOM_ENABLE, 1); /* shift to correct bit */ + max17135_reg_write(REG_MAX17135_ENABLE, reg_val); + } + + return 0; +} + +static int max17135_vcom_disable(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + if (max17135->pass_num == 1) + gpio_set_value(max17135->gpio_pmic_vcom_ctrl, 0); + else { + unsigned int reg_val; + + max17135_reg_read(REG_MAX17135_ENABLE, ®_val); + reg_val &= ~BITFMASK(VCOM_ENABLE); + max17135_reg_write(REG_MAX17135_ENABLE, reg_val); + } + + return 0; +} + +static int max17135_vcom_is_enabled(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + /* read VCOM regulator enable setting */ + if (max17135->pass_num == 1) { + int gpio = gpio_get_value(max17135->gpio_pmic_vcom_ctrl); + if (gpio == 0) + return 0; + else + return 1; + } else { + unsigned int reg_val; + + max17135_reg_read(REG_MAX17135_ENABLE, ®_val); + reg_val &= BITFMASK(VCOM_ENABLE); + if (reg_val != 0) + return 1; + else + return 0; + } +} + +static int max17135_is_power_good(struct max17135 *max17135) +{ + unsigned int reg_val; + unsigned int fld_val; + + max17135_reg_read(REG_MAX17135_FAULT, ®_val); + fld_val = (reg_val & BITFMASK(FAULT_POK)) >> FAULT_POK_LSH; + + /* Check the POK bit */ + return fld_val; +} + +static int max17135_wait_power_good(struct max17135 *max17135) +{ + int i; + + for (i = 0; i < max17135->max_wait * 3; i++) { + if (max17135_is_power_good(max17135)) + return 0; + + msleep(1); + } + + return -ETIMEDOUT; +} + +static int max17135_display_enable(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + /* The Pass 1 parts cannot turn on the PMIC via I2C. */ + if (max17135->pass_num == 1) + gpio_set_value(max17135->gpio_pmic_wakeup, 1); + else { + unsigned int reg_val; + + max17135_reg_read(REG_MAX17135_ENABLE, ®_val); + reg_val &= ~BITFMASK(ENABLE); + reg_val |= BITFVAL(ENABLE, 1); + max17135_reg_write(REG_MAX17135_ENABLE, reg_val); + } + + return max17135_wait_power_good(max17135); +} + +static int max17135_display_disable(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + if (max17135->pass_num == 1) + gpio_set_value(max17135->gpio_pmic_wakeup, 0); + else { + unsigned int reg_val; + + max17135_reg_read(REG_MAX17135_ENABLE, ®_val); + reg_val &= ~BITFMASK(ENABLE); + max17135_reg_write(REG_MAX17135_ENABLE, reg_val); + } + + msleep(max17135->max_wait); + + return 0; +} + +static int max17135_display_is_enabled(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + int gpio = gpio_get_value(max17135->gpio_pmic_wakeup); + + if (gpio == 0) + return 0; + else + return 1; +} + +static int max17135_v3p3_enable(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + gpio_set_value(max17135->gpio_pmic_v3p3, 1); + return 0; +} + +static int max17135_v3p3_disable(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + + gpio_set_value(max17135->gpio_pmic_v3p3, 0); + return 0; +} + +static int max17135_v3p3_is_enabled(struct regulator_dev *reg) +{ + struct max17135 *max17135 = rdev_get_drvdata(reg); + int gpio = gpio_get_value(max17135->gpio_pmic_v3p3); + + if (gpio == 0) + return 0; + else + return 1; +} + +/* + * Regulator operations + */ + +static struct regulator_ops max17135_display_ops = { + .enable = max17135_display_enable, + .disable = max17135_display_disable, + .is_enabled = max17135_display_is_enabled, +}; + +static struct regulator_ops max17135_gvdd_ops = { +}; + +static struct regulator_ops max17135_gvee_ops = { +}; + +static struct regulator_ops max17135_hvinn_ops = { +}; + +static struct regulator_ops max17135_hvinp_ops = { + .enable = max17135_hvinp_enable, + .disable = max17135_hvinp_disable, + .get_voltage = max17135_hvinp_get_voltage, + .set_voltage = max17135_hvinp_set_voltage, +}; + +static struct regulator_ops max17135_vcom_ops = { + .enable = max17135_vcom_enable, + .disable = max17135_vcom_disable, + .get_voltage = max17135_vcom_get_voltage, + .set_voltage = max17135_vcom_set_voltage, + .is_enabled = max17135_vcom_is_enabled, +}; + +static struct regulator_ops max17135_vneg_ops = { +}; + +static struct regulator_ops max17135_vpos_ops = { +}; + +static struct regulator_ops max17135_v3p3_ops = { + .enable = max17135_v3p3_enable, + .disable = max17135_v3p3_disable, + .is_enabled = max17135_v3p3_is_enabled, +}; + + +/* + * Regulator descriptors + */ +static struct regulator_desc max17135_reg[MAX17135_NUM_REGULATORS] = { +{ + .name = "DISPLAY", + .id = MAX17135_DISPLAY, + .ops = &max17135_display_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "GVDD", + .id = MAX17135_GVDD, + .ops = &max17135_gvdd_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "GVEE", + .id = MAX17135_GVEE, + .ops = &max17135_gvee_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "HVINN", + .id = MAX17135_HVINN, + .ops = &max17135_hvinn_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "HVINP", + .id = MAX17135_HVINP, + .ops = &max17135_hvinp_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "VCOM", + .id = MAX17135_VCOM, + .ops = &max17135_vcom_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "VNEG", + .id = MAX17135_VNEG, + .ops = &max17135_vneg_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "VPOS", + .id = MAX17135_VPOS, + .ops = &max17135_vpos_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +{ + .name = "V3P3", + .id = MAX17135_V3P3, + .ops = &max17135_v3p3_ops, + .type = REGULATOR_VOLTAGE, + .owner = THIS_MODULE, +}, +}; + +static void max17135_setup_timings(struct max17135 *max17135) +{ + unsigned int reg_val; + + int timing1, timing2, timing3, timing4, + timing5, timing6, timing7, timing8; + + max17135_reg_read(REG_MAX17135_TIMING1, &timing1); + max17135_reg_read(REG_MAX17135_TIMING2, &timing2); + max17135_reg_read(REG_MAX17135_TIMING3, &timing3); + max17135_reg_read(REG_MAX17135_TIMING4, &timing4); + max17135_reg_read(REG_MAX17135_TIMING5, &timing5); + max17135_reg_read(REG_MAX17135_TIMING6, &timing6); + max17135_reg_read(REG_MAX17135_TIMING7, &timing7); + max17135_reg_read(REG_MAX17135_TIMING8, &timing8); + + if ((timing1 != max17135->gvee_pwrup) || + (timing2 != max17135->vneg_pwrup) || + (timing3 != max17135->vpos_pwrup) || + (timing4 != max17135->gvdd_pwrup) || + (timing5 != max17135->gvdd_pwrdn) || + (timing6 != max17135->vpos_pwrdn) || + (timing7 != max17135->vneg_pwrdn) || + (timing8 != max17135->gvee_pwrdn)) { + max17135_reg_write(REG_MAX17135_TIMING1, max17135->gvee_pwrup); + max17135_reg_write(REG_MAX17135_TIMING2, max17135->vneg_pwrup); + max17135_reg_write(REG_MAX17135_TIMING3, max17135->vpos_pwrup); + max17135_reg_write(REG_MAX17135_TIMING4, max17135->gvdd_pwrup); + max17135_reg_write(REG_MAX17135_TIMING5, max17135->gvdd_pwrdn); + max17135_reg_write(REG_MAX17135_TIMING6, max17135->vpos_pwrdn); + max17135_reg_write(REG_MAX17135_TIMING7, max17135->vneg_pwrdn); + max17135_reg_write(REG_MAX17135_TIMING8, max17135->gvee_pwrdn); + + reg_val = BITFVAL(CTRL_TIMING, true); /* shift to correct bit */ + max17135_reg_write(REG_MAX17135_PRGM_CTRL, reg_val); + } +} + +#define CHECK_PROPERTY_ERROR_KFREE(prop) \ +do { \ + int ret = of_property_read_u32(max17135->dev->of_node, \ + #prop, &max17135->prop); \ + if (ret < 0) { \ + return ret; \ + } \ +} while (0); + +#ifdef CONFIG_OF +static int max17135_pmic_dt_parse_pdata(struct platform_device *pdev, + struct max17135_platform_data *pdata) +{ + struct max17135 *max17135 = dev_get_drvdata(pdev->dev.parent); + struct device_node *pmic_np, *regulators_np, *reg_np; + struct max17135_regulator_data *rdata; + int i, ret; + + pmic_np = of_node_get(max17135->dev->of_node); + if (!pmic_np) { + dev_err(&pdev->dev, "could not find pmic sub-node\n"); + return -ENODEV; + } + + regulators_np = of_find_node_by_name(pmic_np, "regulators"); + if (!regulators_np) { + dev_err(&pdev->dev, "could not find regulators sub-node\n"); + return -EINVAL; + } + + pdata->num_regulators = of_get_child_count(regulators_np); + dev_dbg(&pdev->dev, "num_regulators %d\n", pdata->num_regulators); + + rdata = devm_kzalloc(&pdev->dev, sizeof(*rdata) * + pdata->num_regulators, GFP_KERNEL); + if (!rdata) { + of_node_put(regulators_np); + dev_err(&pdev->dev, "could not allocate memory for" + "regulator data\n"); + return -ENOMEM; + } + + pdata->regulators = rdata; + for_each_child_of_node(regulators_np, reg_np) { + for (i = 0; i < ARRAY_SIZE(max17135_reg); i++) + if (!of_node_cmp(reg_np->name, max17135_reg[i].name)) + break; + + if (i == ARRAY_SIZE(max17135_reg)) { + dev_warn(&pdev->dev, "don't know how to configure" + "regulator %s\n", reg_np->name); + continue; + } + + rdata->id = i; + rdata->initdata = of_get_regulator_init_data(&pdev->dev, + reg_np, + &max17135_reg[i]); + rdata->reg_node = reg_np; + rdata++; + } + of_node_put(regulators_np); + + CHECK_PROPERTY_ERROR_KFREE(vneg_pwrup); + CHECK_PROPERTY_ERROR_KFREE(gvee_pwrup); + CHECK_PROPERTY_ERROR_KFREE(vpos_pwrup); + CHECK_PROPERTY_ERROR_KFREE(gvdd_pwrup); + CHECK_PROPERTY_ERROR_KFREE(gvdd_pwrdn); + CHECK_PROPERTY_ERROR_KFREE(vpos_pwrdn); + CHECK_PROPERTY_ERROR_KFREE(gvee_pwrdn); + CHECK_PROPERTY_ERROR_KFREE(vneg_pwrdn); + + dev_dbg(&pdev->dev, "vneg_pwrup %d, vneg_pwrdn %d, vpos_pwrup %d," + "vpos_pwrdn %d, gvdd_pwrup %d, gvdd_pwrdn %d, gvee_pwrup %d," + "gvee_pwrdn %d\n", max17135->vneg_pwrup, max17135->vneg_pwrdn, + max17135->vpos_pwrup, max17135->vpos_pwrdn, + max17135->gvdd_pwrup, max17135->gvdd_pwrdn, + max17135->gvee_pwrup, max17135->gvee_pwrdn); + + max17135->max_wait = max17135->vpos_pwrup + max17135->vneg_pwrup + + max17135->gvdd_pwrup + max17135->gvee_pwrup; + + max17135->gpio_pmic_wakeup = of_get_named_gpio(pmic_np, + "gpio_pmic_wakeup", 0); + if (!gpio_is_valid(max17135->gpio_pmic_wakeup)) { + dev_err(&pdev->dev, "no epdc pmic wakeup pin available\n"); + goto err; + } + ret = devm_gpio_request_one(&pdev->dev, max17135->gpio_pmic_wakeup, + GPIOF_OUT_INIT_LOW, "epdc-pmic-wake"); + if (ret < 0) + goto err; + + max17135->gpio_pmic_vcom_ctrl = of_get_named_gpio(pmic_np, + "gpio_pmic_vcom_ctrl", 0); + if (!gpio_is_valid(max17135->gpio_pmic_vcom_ctrl)) { + dev_err(&pdev->dev, "no epdc pmic vcom_ctrl pin available\n"); + goto err; + } + ret = devm_gpio_request_one(&pdev->dev, max17135->gpio_pmic_vcom_ctrl, + GPIOF_OUT_INIT_LOW, "epdc-vcom"); + if (ret < 0) + goto err; + + max17135->gpio_pmic_v3p3 = of_get_named_gpio(pmic_np, + "gpio_pmic_v3p3", 0); + if (!gpio_is_valid(max17135->gpio_pmic_v3p3)) { + dev_err(&pdev->dev, "no epdc pmic v3p3 pin available\n"); + goto err; + } + ret = devm_gpio_request_one(&pdev->dev, max17135->gpio_pmic_v3p3, + GPIOF_OUT_INIT_LOW, "epdc-v3p3"); + if (ret < 0) + goto err; + + max17135->gpio_pmic_intr = of_get_named_gpio(pmic_np, + "gpio_pmic_intr", 0); + if (!gpio_is_valid(max17135->gpio_pmic_intr)) { + dev_err(&pdev->dev, "no epdc pmic intr pin available\n"); + goto err; + } + ret = devm_gpio_request_one(&pdev->dev, max17135->gpio_pmic_intr, + GPIOF_IN, "epdc-pmic-int"); + if (ret < 0) + goto err; + + max17135->gpio_pmic_pwrgood = of_get_named_gpio(pmic_np, + "gpio_pmic_pwrgood", 0); + if (!gpio_is_valid(max17135->gpio_pmic_pwrgood)) { + dev_err(&pdev->dev, "no epdc pmic pwrgood pin available\n"); + goto err; + } + ret = devm_gpio_request_one(&pdev->dev, max17135->gpio_pmic_pwrgood, + GPIOF_IN, "epdc-pwrstat"); + if (ret < 0) + goto err; + +err: + return 0; + +} +#else +static int max17135_pmic_dt_parse_pdata(struct platform_device *pdev, + struct max17135 *max17135) +{ + return 0; +} +#endif /* !CONFIG_OF */ + +/* + * Regulator init/probing/exit functions + */ +static int max17135_regulator_probe(struct platform_device *pdev) +{ + struct max17135 *max17135 = dev_get_drvdata(pdev->dev.parent); + struct max17135_platform_data *pdata = max17135->pdata; + struct max17135_data *priv; + struct regulator_dev **rdev; + struct regulator_config config = { }; + int size, i, ret = 0; + + if (max17135->dev->of_node) { + ret = max17135_pmic_dt_parse_pdata(pdev, pdata); + if (ret) + return ret; + } + priv = devm_kzalloc(&pdev->dev, sizeof(struct max17135_data), + GFP_KERNEL); + if (!priv) + return -ENOMEM; + + size = sizeof(struct regulator_dev *) * pdata->num_regulators; + priv->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); + if (!priv->rdev) + return -ENOMEM; + + rdev = priv->rdev; + priv->num_regulators = pdata->num_regulators; + platform_set_drvdata(pdev, priv); + + max17135->vcom_setup = false; + max17135->pass_num = max17135_pass_num; + max17135->vcom_uV = max17135_vcom; + + for (i = 0; i < pdata->num_regulators; i++) { + int id = pdata->regulators[i].id; + + config.dev = max17135->dev; + config.init_data = pdata->regulators[i].initdata; + config.driver_data = max17135; + config.of_node = pdata->regulators[i].reg_node; + + rdev[i] = regulator_register(&max17135_reg[id], &config); + if (IS_ERR(rdev[i])) { + ret = PTR_ERR(rdev[i]); + dev_err(&pdev->dev, "regulator init failed for %d\n", + id); + rdev[i] = NULL; + goto err; + } + } + + /* + * Set up PMIC timing values. + * Should only be done one time! Timing values may only be + * changed a limited number of times according to spec. + */ + max17135_setup_timings(max17135); + + return 0; +err: + while (--i >= 0) + regulator_unregister(rdev[i]); + return ret; +} + +static int max17135_regulator_remove(struct platform_device *pdev) +{ + struct max17135_data *priv = platform_get_drvdata(pdev); + struct regulator_dev **rdev = priv->rdev; + int i; + + for (i = 0; i < priv->num_regulators; i++) + regulator_unregister(rdev[i]); + return 0; +} + +static const struct platform_device_id max17135_pmic_id[] = { + { "max17135-pmic", 0}, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(platform, max17135_pmic_id); + +static struct platform_driver max17135_regulator_driver = { + .probe = max17135_regulator_probe, + .remove = max17135_regulator_remove, + .id_table = max17135_pmic_id, + .driver = { + .name = "max17135-pmic", + }, +}; + +static int __init max17135_regulator_init(void) +{ + return platform_driver_register(&max17135_regulator_driver); +} +subsys_initcall_sync(max17135_regulator_init); + +static void __exit max17135_regulator_exit(void) +{ + platform_driver_unregister(&max17135_regulator_driver); +} +module_exit(max17135_regulator_exit); + +/* + * Parse user specified options (`max17135:') + * example: + * max17135:pass=2,vcom=-1250000 + */ +static int __init max17135_setup(char *options) +{ + int ret; + char *opt; + while ((opt = strsep(&options, ",")) != NULL) { + if (!*opt) + continue; + if (!strncmp(opt, "pass=", 5)) { + ret = kstrtoul(opt + 5, 0, &max17135_pass_num); + if (ret < 0) + return ret; + } + if (!strncmp(opt, "vcom=", 5)) { + int offs = 5; + if (opt[5] == '-') + offs = 6; + ret = kstrtoul(opt + offs, 0, + (long *)&max17135_vcom); + if (ret < 0) + return ret; + max17135_vcom = -max17135_vcom; + } + } + + return 1; +} + +__setup("max17135:", max17135_setup); + +/* Module information */ +MODULE_DESCRIPTION("MAX17135 regulator driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/max17135.h b/include/linux/mfd/max17135.h new file mode 100644 index 000000000000..f41ba1245ebf --- /dev/null +++ b/include/linux/mfd/max17135.h @@ -0,0 +1,207 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2019 NXP + */ +#ifndef __LINUX_REGULATOR_MAX17135_H_ +#define __LINUX_REGULATOR_MAX17135_H_ + +/* + * PMIC Register Addresses + */ +enum { + REG_MAX17135_EXT_TEMP = 0x0, + REG_MAX17135_CONFIG, + REG_MAX17135_INT_TEMP = 0x4, + REG_MAX17135_STATUS, + REG_MAX17135_PRODUCT_REV, + REG_MAX17135_PRODUCT_ID, + REG_MAX17135_DVR, + REG_MAX17135_ENABLE, + REG_MAX17135_FAULT, /*0x0A*/ + REG_MAX17135_HVINP, + REG_MAX17135_PRGM_CTRL, + REG_MAX17135_TIMING1 = 0x10, /* Timing regs base address is 0x10 */ + REG_MAX17135_TIMING2, + REG_MAX17135_TIMING3, + REG_MAX17135_TIMING4, + REG_MAX17135_TIMING5, + REG_MAX17135_TIMING6, + REG_MAX17135_TIMING7, + REG_MAX17135_TIMING8, +}; +#define MAX17135_REG_NUM 21 +#define MAX17135_MAX_REGISTER 0xFF + +/* + * Bitfield macros that use rely on bitfield width/shift information. + */ +#define BITFMASK(field) (((1U << (field ## _WID)) - 1) << (field ## _LSH)) +#define BITFVAL(field, val) ((val) << (field ## _LSH)) +#define BITFEXT(var, bit) ((var & BITFMASK(bit)) >> (bit ## _LSH)) + +/* + * Shift and width values for each register bitfield + */ +#define EXT_TEMP_LSH 7 +#define EXT_TEMP_WID 9 + +#define THERMAL_SHUTDOWN_LSH 0 +#define THERMAL_SHUTDOWN_WID 1 + +#define INT_TEMP_LSH 7 +#define INT_TEMP_WID 9 + +#define STAT_BUSY_LSH 0 +#define STAT_BUSY_WID 1 +#define STAT_OPEN_LSH 1 +#define STAT_OPEN_WID 1 +#define STAT_SHRT_LSH 2 +#define STAT_SHRT_WID 1 + +#define PROD_REV_LSH 0 +#define PROD_REV_WID 8 + +#define PROD_ID_LSH 0 +#define PROD_ID_WID 8 + +#define DVR_LSH 0 +#define DVR_WID 8 + +#define ENABLE_LSH 0 +#define ENABLE_WID 1 +#define VCOM_ENABLE_LSH 1 +#define VCOM_ENABLE_WID 1 + +#define FAULT_FBPG_LSH 0 +#define FAULT_FBPG_WID 1 +#define FAULT_HVINP_LSH 1 +#define FAULT_HVINP_WID 1 +#define FAULT_HVINN_LSH 2 +#define FAULT_HVINN_WID 1 +#define FAULT_FBNG_LSH 3 +#define FAULT_FBNG_WID 1 +#define FAULT_HVINPSC_LSH 4 +#define FAULT_HVINPSC_WID 1 +#define FAULT_HVINNSC_LSH 5 +#define FAULT_HVINNSC_WID 1 +#define FAULT_OT_LSH 6 +#define FAULT_OT_WID 1 +#define FAULT_POK_LSH 7 +#define FAULT_POK_WID 1 + +#define HVINP_LSH 0 +#define HVINP_WID 4 + +#define CTRL_DVR_LSH 0 +#define CTRL_DVR_WID 1 +#define CTRL_TIMING_LSH 1 +#define CTRL_TIMING_WID 1 + +#define TIMING1_LSH 0 +#define TIMING1_WID 8 +#define TIMING2_LSH 0 +#define TIMING2_WID 8 +#define TIMING3_LSH 0 +#define TIMING3_WID 8 +#define TIMING4_LSH 0 +#define TIMING4_WID 8 +#define TIMING5_LSH 0 +#define TIMING5_WID 8 +#define TIMING6_LSH 0 +#define TIMING6_WID 8 +#define TIMING7_LSH 0 +#define TIMING7_WID 8 +#define TIMING8_LSH 0 +#define TIMING8_WID 8 + +struct max17135 { + /* chip revision */ + int rev; + + struct device *dev; + struct max17135_platform_data *pdata; + + /* Platform connection */ + struct i2c_client *i2c_client; + + /* Timings */ + unsigned int gvee_pwrup; + unsigned int vneg_pwrup; + unsigned int vpos_pwrup; + unsigned int gvdd_pwrup; + unsigned int gvdd_pwrdn; + unsigned int vpos_pwrdn; + unsigned int vneg_pwrdn; + unsigned int gvee_pwrdn; + + /* GPIOs */ + int gpio_pmic_pwrgood; + int gpio_pmic_vcom_ctrl; + int gpio_pmic_wakeup; + int gpio_pmic_v3p3; + int gpio_pmic_intr; + + /* MAX17135 part variables */ + int pass_num; + int vcom_uV; + + /* One-time VCOM setup marker */ + bool vcom_setup; + + /* powerup/powerdown wait time */ + int max_wait; +}; + +enum { + /* In alphabetical order */ + MAX17135_DISPLAY, /* virtual master enable */ + MAX17135_GVDD, + MAX17135_GVEE, + MAX17135_HVINN, + MAX17135_HVINP, + MAX17135_VCOM, + MAX17135_VNEG, + MAX17135_VPOS, + MAX17135_V3P3, + MAX17135_NUM_REGULATORS, +}; + +/* + * Declarations + */ +struct regulator_init_data; +struct max17135_regulator_data; + +struct max17135_platform_data { + unsigned int gvee_pwrup; + unsigned int vneg_pwrup; + unsigned int vpos_pwrup; + unsigned int gvdd_pwrup; + unsigned int gvdd_pwrdn; + unsigned int vpos_pwrdn; + unsigned int vneg_pwrdn; + unsigned int gvee_pwrdn; + int gpio_pmic_pwrgood; + int gpio_pmic_vcom_ctrl; + int gpio_pmic_wakeup; + int gpio_pmic_v3p3; + int gpio_pmic_intr; + int pass_num; + int vcom_uV; + + /* PMIC */ + struct max17135_regulator_data *regulators; + int num_regulators; +}; + +struct max17135_regulator_data { + int id; + struct regulator_init_data *initdata; + struct device_node *reg_node; +}; + +int max17135_reg_read(int reg_num, unsigned int *reg_val); +int max17135_reg_write(int reg_num, const unsigned int reg_val); + +#endif diff --git a/include/linux/pmic_status.h b/include/linux/pmic_status.h new file mode 100644 index 000000000000..cbef24194782 --- /dev/null +++ b/include/linux/pmic_status.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright 2004-2015 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2019 NXP + */ + +#ifndef __ASM_ARCH_MXC_PMIC_STATUS_H__ +#define __ASM_ARCH_MXC_PMIC_STATUS_H__ +#include +#ifdef __KERNEL__ +#include /* copy_{from,to}_user() */ +#endif +/*! + * @file arch-mxc/pmic_status.h + * @brief PMIC APIs return code definition. + * + * @ingroup PMIC_CORE + */ + +/*! + * @enum PMIC_STATUS + * @brief Define return values for all PMIC APIs. + * + * These return values are used by all of the PMIC APIs. + * + * @ingroup PMIC + */ +typedef enum { + PMIC_SUCCESS = 0, /*!< The requested operation was successfully + completed. */ + PMIC_ERROR = -1, /*!< The requested operation could not be completed + due to an error. */ + PMIC_PARAMETER_ERROR = -2, /*!< The requested operation failed because + one or more of the parameters was + invalid. */ + PMIC_NOT_SUPPORTED = -3, /*!< The requested operation could not be + completed because the PMIC hardware + does not support it. */ + PMIC_SYSTEM_ERROR_EINTR = -EINTR, + + PMIC_MALLOC_ERROR = -5, /*!< Error in malloc function */ + PMIC_UNSUBSCRIBE_ERROR = -6, /*!< Error in un-subscribe event */ + PMIC_EVENT_NOT_SUBSCRIBED = -7, /*!< Event occur and not subscribed */ + PMIC_EVENT_CALL_BACK = -8, /*!< Error - bad call back */ + PMIC_CLIENT_NBOVERFLOW = -9, /*!< The requested operation could not be + completed because there are too many + PMIC client requests */ +} PMIC_STATUS; + +/* + * Bitfield macros that use rely on bitfield width/shift information. + */ +#define BITFMASK(field) (((1U << (field ## _WID)) - 1) << (field ## _LSH)) +#define BITFVAL(field, val) ((val) << (field ## _LSH)) +#define BITFEXT(var, bit) ((var & BITFMASK(bit)) >> (bit ## _LSH)) + +/* + * Macros implementing error handling + */ +#define CHECK_ERROR(a) \ +do { \ + int ret = (a); \ + if (ret != PMIC_SUCCESS) \ + return ret; \ +} while (0) + +#define CHECK_ERROR_KFREE(func, freeptrs) \ +do { \ + int ret = (func); \ + if (ret != PMIC_SUCCESS) { \ + freeptrs; \ + return ret; \ + } \ +} while (0); + +#endif /* __ASM_ARCH_MXC_PMIC_STATUS_H__ */