spi: Fixes for v5.3

A bunch of small, device specific things here plus a DT bindings fix for
 the new validatable YAML binding format.  The most notable thing is the
 fix for GPIO chip selects which fixes a corner case in updates of that
 code to modern APIs, unfortunately due to a historical mess the code
 around GPIO support is obscure, fragile and an ABI which makes and
 attempt to improve the situation painful.
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Merge tag 'spi-fix-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "A bunch of small, device specific things here plus a DT bindings fix
  for the new validatable YAML binding format.

  The most notable thing is the fix for GPIO chip selects which fixes a
  corner case in updates of that code to modern APIs, unfortunately due
  to a historical mess the code around GPIO support is obscure, fragile
  and an ABI which makes and attempt to improve the situation painful"

* tag 'spi-fix-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: pxa2xx: Add support for Intel Tiger Lake
  spi: bcm2835: Fix 3-wire mode if DMA is enabled
  spi: pxa2xx: Balance runtime PM enable/disable on error
  spi: gpio: Add SPI_MASTER_GPIO_SS flag
  spi: spi-fsl-qspi: change i.MX7D RX FIFO size
  spi: dt-bindings: spi-controller: remove unnecessary 'maxItems: 1' from reg
This commit is contained in:
Linus Torvalds 2019-08-05 11:49:02 -07:00
commit 0eb0ce0a78
5 changed files with 21 additions and 5 deletions

View File

@ -73,7 +73,6 @@ patternProperties:
Compatible of the SPI device.
reg:
maxItems: 1
minimum: 0
maximum: 256
description:

View File

@ -834,7 +834,8 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr,
bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
/* handle all the 3-wire mode */
if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf))
if (spi->mode & SPI_3WIRE && tfr->rx_buf &&
tfr->rx_buf != ctlr->dummy_rx)
cs |= BCM2835_SPI_CS_REN;
else
cs &= ~BCM2835_SPI_CS_REN;

View File

@ -206,7 +206,7 @@ static const struct fsl_qspi_devtype_data imx6sx_data = {
};
static const struct fsl_qspi_devtype_data imx7d_data = {
.rxfifo = SZ_512,
.rxfifo = SZ_128,
.txfifo = SZ_512,
.ahb_buf_size = SZ_1K,
.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK,

View File

@ -410,6 +410,12 @@ static int spi_gpio_probe(struct platform_device *pdev)
bb = &spi_gpio->bitbang;
bb->master = master;
/*
* There is some additional business, apart from driving the CS GPIO
* line, that we need to do on selection. This makes the local
* callback for chipselect always get called.
*/
master->flags |= SPI_MASTER_GPIO_SS;
bb->chipselect = spi_gpio_chipselect;
bb->set_line_direction = spi_gpio_set_direction;

View File

@ -1457,6 +1457,14 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
{ PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP },
/* TGL-LP */
{ PCI_VDEVICE(INTEL, 0xa0aa), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0ab), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0de), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0df), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0fb), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0fd), LPSS_CNL_SSP },
{ PCI_VDEVICE(INTEL, 0xa0fe), LPSS_CNL_SSP },
{ },
};
@ -1831,14 +1839,16 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
status = devm_spi_register_controller(&pdev->dev, controller);
if (status != 0) {
dev_err(&pdev->dev, "problem registering spi controller\n");
goto out_error_clock_enabled;
goto out_error_pm_runtime_enabled;
}
return status;
out_error_clock_enabled:
out_error_pm_runtime_enabled:
pm_runtime_put_noidle(&pdev->dev);
pm_runtime_disable(&pdev->dev);
out_error_clock_enabled:
clk_disable_unprepare(ssp->clk);
out_error_dma_irq_alloc: