2019-06-03 14:44:50 +09:00
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// SPDX-License-Identifier: GPL-2.0-only
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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2019-08-04 15:55:51 +09:00
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#include <linux/delay.h>
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#include <drm/drm_vblank.h>
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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#include "msm_drv.h"
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2016-09-29 08:58:32 +09:00
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#include "msm_gem.h"
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2013-11-17 02:56:06 +09:00
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#include "msm_mmu.h"
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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#include "mdp4_kms.h"
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static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev);
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static int mdp4_hw_init(struct msm_kms *kms)
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{
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2013-12-01 07:24:22 +09:00
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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struct drm_device *dev = mdp4_kms->dev;
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uint32_t version, major, minor, dmap_cfg, vg_cfg;
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unsigned long clk;
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int ret = 0;
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pm_runtime_get_sync(dev->dev);
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2013-11-17 03:07:31 +09:00
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mdp4_enable(mdp4_kms);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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version = mdp4_read(mdp4_kms, REG_MDP4_VERSION);
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2013-11-17 03:07:31 +09:00
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mdp4_disable(mdp4_kms);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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major = FIELD(version, MDP4_VERSION_MAJOR);
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minor = FIELD(version, MDP4_VERSION_MINOR);
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2013-12-02 02:12:54 +09:00
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DBG("found MDP4 version v%d.%d", major, minor);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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if (major != 4) {
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2018-10-21 02:49:26 +09:00
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DRM_DEV_ERROR(dev->dev, "unexpected MDP version: v%d.%d\n",
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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major, minor);
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ret = -ENXIO;
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goto out;
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}
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mdp4_kms->rev = minor;
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if (mdp4_kms->rev > 1) {
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mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER0, 0x0707ffff);
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mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER1, 0x03073f3f);
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}
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mdp4_write(mdp4_kms, REG_MDP4_PORTMAP_MODE, 0x3);
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/* max read pending cmd config, 3 pending requests: */
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mdp4_write(mdp4_kms, REG_MDP4_READ_CNFG, 0x02222);
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clk = clk_get_rate(mdp4_kms->clk);
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if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) {
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dmap_cfg = 0x47; /* 16 bytes-burst x 8 req */
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vg_cfg = 0x47; /* 16 bytes-burs x 8 req */
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} else {
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dmap_cfg = 0x27; /* 8 bytes-burst x 8 req */
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vg_cfg = 0x43; /* 16 bytes-burst x 4 req */
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}
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DBG("fetch config: dmap=%02x, vg=%02x", dmap_cfg, vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_P), dmap_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_E), dmap_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG1), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG2), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB1), vg_cfg);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB2), vg_cfg);
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if (mdp4_kms->rev >= 2)
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mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG_UPDATE_METHOD, 1);
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2014-08-06 20:43:12 +09:00
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mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG, 0);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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/* disable CSC matrix / YUV by default: */
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG1), 0);
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mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG2), 0);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_P_OP_MODE, 0);
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mdp4_write(mdp4_kms, REG_MDP4_DMA_S_OP_MODE, 0);
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mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(1), 0);
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mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(2), 0);
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if (mdp4_kms->rev > 1)
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mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1);
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out:
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pm_runtime_put_sync(dev->dev);
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return ret;
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}
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2019-08-30 01:45:15 +09:00
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static void mdp4_enable_commit(struct msm_kms *kms)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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mdp4_enable(mdp4_kms);
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}
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static void mdp4_disable_commit(struct msm_kms *kms)
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2015-01-31 07:04:45 +09:00
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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2019-08-30 01:45:15 +09:00
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mdp4_disable(mdp4_kms);
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}
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static void mdp4_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *state)
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{
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2015-01-31 07:04:45 +09:00
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}
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2019-08-30 01:45:14 +09:00
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static void mdp4_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
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{
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/* TODO */
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}
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2019-08-30 01:45:12 +09:00
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static void mdp4_wait_flush(struct msm_kms *kms, unsigned crtc_mask)
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{
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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struct drm_crtc *crtc;
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for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask)
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mdp4_crtc_wait_for_commit_done(crtc);
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}
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2019-08-30 01:45:13 +09:00
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static void mdp4_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
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2015-01-31 07:04:45 +09:00
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{
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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static long mdp4_round_pixclk(struct msm_kms *kms, unsigned long rate,
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struct drm_encoder *encoder)
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{
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/* if we had >1 encoder, we'd need something more clever: */
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2015-11-18 21:27:16 +09:00
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switch (encoder->encoder_type) {
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case DRM_MODE_ENCODER_TMDS:
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return mdp4_dtv_round_pixclk(encoder, rate);
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case DRM_MODE_ENCODER_LVDS:
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case DRM_MODE_ENCODER_DSI:
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default:
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return rate;
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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}
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2016-02-25 14:49:44 +09:00
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static const char * const iommu_ports[] = {
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"mdp_port0_cb0", "mdp_port1_cb0",
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};
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
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static void mdp4_destroy(struct msm_kms *kms)
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{
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2013-12-01 07:24:22 +09:00
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struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
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2016-06-15 21:34:31 +09:00
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struct device *dev = mdp4_kms->dev->dev;
|
2017-06-13 23:22:37 +09:00
|
|
|
struct msm_gem_address_space *aspace = kms->aspace;
|
2016-02-25 14:49:44 +09:00
|
|
|
|
2014-04-23 01:27:28 +09:00
|
|
|
if (mdp4_kms->blank_cursor_iova)
|
2018-11-08 07:35:51 +09:00
|
|
|
msm_gem_unpin_iova(mdp4_kms->blank_cursor_bo, kms->aspace);
|
2018-01-26 12:55:54 +09:00
|
|
|
drm_gem_object_put_unlocked(mdp4_kms->blank_cursor_bo);
|
2016-06-15 21:34:31 +09:00
|
|
|
|
2016-09-29 08:58:32 +09:00
|
|
|
if (aspace) {
|
|
|
|
aspace->mmu->funcs->detach(aspace->mmu,
|
|
|
|
iommu_ports, ARRAY_SIZE(iommu_ports));
|
2017-03-08 02:02:52 +09:00
|
|
|
msm_gem_address_space_put(aspace);
|
2016-09-29 08:58:32 +09:00
|
|
|
}
|
|
|
|
|
2016-06-15 21:34:31 +09:00
|
|
|
if (mdp4_kms->rpm_enabled)
|
|
|
|
pm_runtime_disable(dev);
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
kfree(mdp4_kms);
|
|
|
|
}
|
|
|
|
|
2013-12-01 07:24:22 +09:00
|
|
|
static const struct mdp_kms_funcs kms_funcs = {
|
|
|
|
.base = {
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
.hw_init = mdp4_hw_init,
|
|
|
|
.irq_preinstall = mdp4_irq_preinstall,
|
|
|
|
.irq_postinstall = mdp4_irq_postinstall,
|
|
|
|
.irq_uninstall = mdp4_irq_uninstall,
|
|
|
|
.irq = mdp4_irq,
|
|
|
|
.enable_vblank = mdp4_enable_vblank,
|
|
|
|
.disable_vblank = mdp4_disable_vblank,
|
2019-08-30 01:45:15 +09:00
|
|
|
.enable_commit = mdp4_enable_commit,
|
|
|
|
.disable_commit = mdp4_disable_commit,
|
2015-01-31 07:04:45 +09:00
|
|
|
.prepare_commit = mdp4_prepare_commit,
|
2019-08-30 01:45:14 +09:00
|
|
|
.flush_commit = mdp4_flush_commit,
|
2019-08-30 01:45:12 +09:00
|
|
|
.wait_flush = mdp4_wait_flush,
|
2015-01-31 07:04:45 +09:00
|
|
|
.complete_commit = mdp4_complete_commit,
|
2013-12-01 04:58:23 +09:00
|
|
|
.get_format = mdp_get_format,
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
.round_pixclk = mdp4_round_pixclk,
|
|
|
|
.destroy = mdp4_destroy,
|
2013-12-01 07:24:22 +09:00
|
|
|
},
|
|
|
|
.set_irqmask = mdp4_set_irqmask,
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
};
|
|
|
|
|
|
|
|
int mdp4_disable(struct mdp4_kms *mdp4_kms)
|
|
|
|
{
|
|
|
|
DBG("");
|
|
|
|
|
|
|
|
clk_disable_unprepare(mdp4_kms->clk);
|
|
|
|
if (mdp4_kms->pclk)
|
|
|
|
clk_disable_unprepare(mdp4_kms->pclk);
|
2018-11-22 10:52:27 +09:00
|
|
|
if (mdp4_kms->lut_clk)
|
|
|
|
clk_disable_unprepare(mdp4_kms->lut_clk);
|
2014-07-01 07:50:51 +09:00
|
|
|
if (mdp4_kms->axi_clk)
|
|
|
|
clk_disable_unprepare(mdp4_kms->axi_clk);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mdp4_enable(struct mdp4_kms *mdp4_kms)
|
|
|
|
{
|
|
|
|
DBG("");
|
|
|
|
|
|
|
|
clk_prepare_enable(mdp4_kms->clk);
|
|
|
|
if (mdp4_kms->pclk)
|
|
|
|
clk_prepare_enable(mdp4_kms->pclk);
|
2018-11-22 10:52:27 +09:00
|
|
|
if (mdp4_kms->lut_clk)
|
|
|
|
clk_prepare_enable(mdp4_kms->lut_clk);
|
2014-07-01 07:50:51 +09:00
|
|
|
if (mdp4_kms->axi_clk)
|
|
|
|
clk_prepare_enable(mdp4_kms->axi_clk);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
|
|
|
|
int intf_type)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
{
|
|
|
|
struct drm_device *dev = mdp4_kms->dev;
|
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
|
|
|
struct drm_encoder *encoder;
|
2014-08-02 02:08:11 +09:00
|
|
|
struct drm_connector *connector;
|
2015-11-18 20:45:50 +09:00
|
|
|
struct device_node *panel_node;
|
2017-01-16 13:12:03 +09:00
|
|
|
int dsi_id;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
int ret;
|
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
switch (intf_type) {
|
|
|
|
case DRM_MODE_ENCODER_LVDS:
|
2015-11-18 20:45:50 +09:00
|
|
|
/*
|
2016-09-14 00:21:34 +09:00
|
|
|
* bail out early if there is no panel node (no need to
|
|
|
|
* initialize LCDC encoder and LVDS connector)
|
2015-11-18 20:45:50 +09:00
|
|
|
*/
|
2017-03-22 22:26:06 +09:00
|
|
|
panel_node = of_graph_get_remote_node(dev->dev->of_node, 0, 0);
|
2016-09-14 00:21:34 +09:00
|
|
|
if (!panel_node)
|
|
|
|
return 0;
|
2015-11-18 20:45:50 +09:00
|
|
|
|
|
|
|
encoder = mdp4_lcdc_encoder_init(dev, panel_node);
|
2015-10-19 15:50:52 +09:00
|
|
|
if (IS_ERR(encoder)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to construct LCDC encoder\n");
|
2015-10-19 15:50:52 +09:00
|
|
|
return PTR_ERR(encoder);
|
|
|
|
}
|
2013-10-09 01:57:48 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
/* LCDC can be hooked to DMA_P (TODO: Add DMA_S later?) */
|
|
|
|
encoder->possible_crtcs = 1 << DMA_P;
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-11-18 20:45:50 +09:00
|
|
|
connector = mdp4_lvds_connector_init(dev, panel_node, encoder);
|
2015-10-19 15:50:52 +09:00
|
|
|
if (IS_ERR(connector)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to initialize LVDS connector\n");
|
2015-10-19 15:50:52 +09:00
|
|
|
return PTR_ERR(connector);
|
|
|
|
}
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
priv->encoders[priv->num_encoders++] = encoder;
|
|
|
|
priv->connectors[priv->num_connectors++] = connector;
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
break;
|
|
|
|
case DRM_MODE_ENCODER_TMDS:
|
|
|
|
encoder = mdp4_dtv_encoder_init(dev);
|
|
|
|
if (IS_ERR(encoder)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to construct DTV encoder\n");
|
2015-10-19 15:50:52 +09:00
|
|
|
return PTR_ERR(encoder);
|
|
|
|
}
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
/* DTV can be hooked to DMA_E: */
|
|
|
|
encoder->possible_crtcs = 1 << 1;
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
if (priv->hdmi) {
|
|
|
|
/* Construct bridge/connector for HDMI: */
|
2016-02-23 06:08:35 +09:00
|
|
|
ret = msm_hdmi_modeset_init(priv->hdmi, dev, encoder);
|
2015-10-19 15:50:52 +09:00
|
|
|
if (ret) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to initialize HDMI: %d\n", ret);
|
2015-10-19 15:50:52 +09:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
priv->encoders[priv->num_encoders++] = encoder;
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-11-18 21:28:28 +09:00
|
|
|
break;
|
|
|
|
case DRM_MODE_ENCODER_DSI:
|
|
|
|
/* only DSI1 supported for now */
|
|
|
|
dsi_id = 0;
|
|
|
|
|
|
|
|
if (!priv->dsi[dsi_id])
|
|
|
|
break;
|
|
|
|
|
2017-01-16 13:12:03 +09:00
|
|
|
encoder = mdp4_dsi_encoder_init(dev);
|
|
|
|
if (IS_ERR(encoder)) {
|
|
|
|
ret = PTR_ERR(encoder);
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev,
|
2017-01-16 13:12:03 +09:00
|
|
|
"failed to construct DSI encoder: %d\n", ret);
|
|
|
|
return ret;
|
2015-11-18 21:28:28 +09:00
|
|
|
}
|
|
|
|
|
2017-01-16 13:12:03 +09:00
|
|
|
/* TODO: Add DMA_S later? */
|
|
|
|
encoder->possible_crtcs = 1 << DMA_P;
|
|
|
|
priv->encoders[priv->num_encoders++] = encoder;
|
|
|
|
|
|
|
|
ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder);
|
2015-11-18 21:28:28 +09:00
|
|
|
if (ret) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to initialize DSI: %d\n",
|
2015-11-18 21:28:28 +09:00
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
break;
|
|
|
|
default:
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "Invalid or unsupported interface\n");
|
2015-10-19 15:50:52 +09:00
|
|
|
return -EINVAL;
|
2014-08-02 02:08:11 +09:00
|
|
|
}
|
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
return 0;
|
|
|
|
}
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
static int modeset_init(struct mdp4_kms *mdp4_kms)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = mdp4_kms->dev;
|
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
|
|
|
struct drm_plane *plane;
|
|
|
|
struct drm_crtc *crtc;
|
|
|
|
int i, ret;
|
|
|
|
static const enum mdp4_pipe rgb_planes[] = {
|
|
|
|
RGB1, RGB2,
|
|
|
|
};
|
|
|
|
static const enum mdp4_pipe vg_planes[] = {
|
|
|
|
VG1, VG2,
|
|
|
|
};
|
|
|
|
static const enum mdp4_dma mdp4_crtcs[] = {
|
|
|
|
DMA_P, DMA_E,
|
|
|
|
};
|
|
|
|
static const char * const mdp4_crtc_names[] = {
|
|
|
|
"DMA_P", "DMA_E",
|
|
|
|
};
|
|
|
|
static const int mdp4_intfs[] = {
|
|
|
|
DRM_MODE_ENCODER_LVDS,
|
2015-11-18 21:28:28 +09:00
|
|
|
DRM_MODE_ENCODER_DSI,
|
2015-10-19 15:50:52 +09:00
|
|
|
DRM_MODE_ENCODER_TMDS,
|
|
|
|
};
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
/* construct non-private planes: */
|
|
|
|
for (i = 0; i < ARRAY_SIZE(vg_planes); i++) {
|
|
|
|
plane = mdp4_plane_init(dev, vg_planes[i], false);
|
|
|
|
if (IS_ERR(plane)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev,
|
2015-10-19 15:50:52 +09:00
|
|
|
"failed to construct plane for VG%d\n", i + 1);
|
|
|
|
ret = PTR_ERR(plane);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
priv->planes[priv->num_planes++] = plane;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
}
|
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
for (i = 0; i < ARRAY_SIZE(mdp4_crtcs); i++) {
|
|
|
|
plane = mdp4_plane_init(dev, rgb_planes[i], true);
|
|
|
|
if (IS_ERR(plane)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev,
|
2015-10-19 15:50:52 +09:00
|
|
|
"failed to construct plane for RGB%d\n", i + 1);
|
|
|
|
ret = PTR_ERR(plane);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
crtc = mdp4_crtc_init(dev, plane, priv->num_crtcs, i,
|
|
|
|
mdp4_crtcs[i]);
|
|
|
|
if (IS_ERR(crtc)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to construct crtc for %s\n",
|
2015-10-19 15:50:52 +09:00
|
|
|
mdp4_crtc_names[i]);
|
|
|
|
ret = PTR_ERR(crtc);
|
|
|
|
goto fail;
|
|
|
|
}
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
priv->crtcs[priv->num_crtcs++] = crtc;
|
|
|
|
}
|
2014-08-02 02:08:11 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
/*
|
|
|
|
* we currently set up two relatively fixed paths:
|
|
|
|
*
|
|
|
|
* LCDC/LVDS path: RGB1 -> DMA_P -> LCDC -> LVDS
|
2015-11-18 21:28:28 +09:00
|
|
|
* or
|
|
|
|
* DSI path: RGB1 -> DMA_P -> DSI1 -> DSI Panel
|
|
|
|
*
|
2015-10-19 15:50:52 +09:00
|
|
|
* DTV/HDMI path: RGB2 -> DMA_E -> DTV -> HDMI
|
|
|
|
*/
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
2015-10-19 15:50:52 +09:00
|
|
|
for (i = 0; i < ARRAY_SIZE(mdp4_intfs); i++) {
|
|
|
|
ret = mdp4_modeset_init_intf(mdp4_kms, mdp4_intfs[i]);
|
2014-11-05 03:33:14 +09:00
|
|
|
if (ret) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to initialize intf: %d, %d\n",
|
2015-10-19 15:50:52 +09:00
|
|
|
i, ret);
|
2014-11-05 03:33:14 +09:00
|
|
|
goto fail;
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct msm_kms *mdp4_kms_init(struct drm_device *dev)
|
|
|
|
{
|
2016-12-18 07:01:19 +09:00
|
|
|
struct platform_device *pdev = to_platform_device(dev->dev);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
struct mdp4_platform_config *config = mdp4_get_config(pdev);
|
2021-08-12 02:06:31 +09:00
|
|
|
struct msm_drm_private *priv = dev->dev_private;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
struct mdp4_kms *mdp4_kms;
|
|
|
|
struct msm_kms *kms = NULL;
|
2016-09-29 08:58:32 +09:00
|
|
|
struct msm_gem_address_space *aspace;
|
2016-05-18 18:36:03 +09:00
|
|
|
int irq, ret;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
|
|
|
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
|
|
|
|
if (!mdp4_kms) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2013-12-01 07:24:22 +09:00
|
|
|
mdp_kms_init(&mdp4_kms->base, &kms_funcs);
|
|
|
|
|
2021-08-12 02:06:31 +09:00
|
|
|
priv->kms = &mdp4_kms->base.base;
|
|
|
|
kms = priv->kms;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
|
|
|
mdp4_kms->dev = dev;
|
|
|
|
|
|
|
|
mdp4_kms->mmio = msm_ioremap(pdev, NULL, "MDP4");
|
|
|
|
if (IS_ERR(mdp4_kms->mmio)) {
|
|
|
|
ret = PTR_ERR(mdp4_kms->mmio);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2016-05-18 18:36:03 +09:00
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
|
|
if (irq < 0) {
|
|
|
|
ret = irq;
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to get irq: %d\n", ret);
|
2016-05-18 18:36:03 +09:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
kms->irq = irq;
|
|
|
|
|
2014-11-01 01:19:40 +09:00
|
|
|
/* NOTE: driver for this regulator still missing upstream.. use
|
|
|
|
* _get_exclusive() and ignore the error if it does not exist
|
|
|
|
* (and hope that the bootloader left it on for us)
|
|
|
|
*/
|
2013-12-16 06:23:05 +09:00
|
|
|
mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
if (IS_ERR(mdp4_kms->vdd))
|
|
|
|
mdp4_kms->vdd = NULL;
|
|
|
|
|
|
|
|
if (mdp4_kms->vdd) {
|
|
|
|
ret = regulator_enable(mdp4_kms->vdd);
|
|
|
|
if (ret) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to enable regulator vdd: %d\n", ret);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mdp4_kms->clk = devm_clk_get(&pdev->dev, "core_clk");
|
|
|
|
if (IS_ERR(mdp4_kms->clk)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to get core_clk\n");
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
ret = PTR_ERR(mdp4_kms->clk);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
mdp4_kms->pclk = devm_clk_get(&pdev->dev, "iface_clk");
|
|
|
|
if (IS_ERR(mdp4_kms->pclk))
|
|
|
|
mdp4_kms->pclk = NULL;
|
|
|
|
|
2018-11-22 10:52:27 +09:00
|
|
|
if (mdp4_kms->rev >= 2) {
|
|
|
|
mdp4_kms->lut_clk = devm_clk_get(&pdev->dev, "lut_clk");
|
|
|
|
if (IS_ERR(mdp4_kms->lut_clk)) {
|
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to get lut_clk\n");
|
|
|
|
ret = PTR_ERR(mdp4_kms->lut_clk);
|
|
|
|
goto fail;
|
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
}
|
|
|
|
|
2016-06-10 15:25:43 +09:00
|
|
|
mdp4_kms->axi_clk = devm_clk_get(&pdev->dev, "bus_clk");
|
2014-07-01 07:50:51 +09:00
|
|
|
if (IS_ERR(mdp4_kms->axi_clk)) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to get axi_clk\n");
|
2014-07-01 07:50:51 +09:00
|
|
|
ret = PTR_ERR(mdp4_kms->axi_clk);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
clk_set_rate(mdp4_kms->clk, config->max_clk);
|
2018-11-22 10:52:27 +09:00
|
|
|
if (mdp4_kms->lut_clk)
|
|
|
|
clk_set_rate(mdp4_kms->lut_clk, config->max_clk);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
2016-06-15 21:34:31 +09:00
|
|
|
pm_runtime_enable(dev->dev);
|
|
|
|
mdp4_kms->rpm_enabled = true;
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
/* make sure things are off before attaching iommu (bootloader could
|
|
|
|
* have left things on, in which case we'll start getting faults if
|
|
|
|
* we don't disable):
|
|
|
|
*/
|
2013-11-17 03:07:31 +09:00
|
|
|
mdp4_enable(mdp4_kms);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0);
|
|
|
|
mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0);
|
2013-11-17 03:07:31 +09:00
|
|
|
mdp4_disable(mdp4_kms);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
mdelay(16);
|
|
|
|
|
2013-11-17 02:56:06 +09:00
|
|
|
if (config->iommu) {
|
2016-09-29 08:58:32 +09:00
|
|
|
aspace = msm_gem_address_space_create(&pdev->dev,
|
|
|
|
config->iommu, "mdp4");
|
|
|
|
if (IS_ERR(aspace)) {
|
|
|
|
ret = PTR_ERR(aspace);
|
2013-11-17 02:56:06 +09:00
|
|
|
goto fail;
|
|
|
|
}
|
2016-09-29 08:58:32 +09:00
|
|
|
|
2017-06-13 23:22:37 +09:00
|
|
|
kms->aspace = aspace;
|
2016-09-29 08:58:32 +09:00
|
|
|
|
|
|
|
ret = aspace->mmu->funcs->attach(aspace->mmu, iommu_ports,
|
2013-11-17 02:56:06 +09:00
|
|
|
ARRAY_SIZE(iommu_ports));
|
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
} else {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_INFO(dev->dev, "no iommu, fallback to phys "
|
2013-11-17 02:56:06 +09:00
|
|
|
"contig buffers for scanout\n");
|
2016-09-29 08:58:32 +09:00
|
|
|
aspace = NULL;
|
2013-11-17 02:56:06 +09:00
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
|
|
|
|
ret = modeset_init(mdp4_kms);
|
|
|
|
if (ret) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "modeset_init failed: %d\n", ret);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2018-11-22 10:52:28 +09:00
|
|
|
mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC | MSM_BO_SCANOUT);
|
2014-04-23 01:27:28 +09:00
|
|
|
if (IS_ERR(mdp4_kms->blank_cursor_bo)) {
|
|
|
|
ret = PTR_ERR(mdp4_kms->blank_cursor_bo);
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "could not allocate blank-cursor bo: %d\n", ret);
|
2014-04-23 01:27:28 +09:00
|
|
|
mdp4_kms->blank_cursor_bo = NULL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2018-11-08 07:35:50 +09:00
|
|
|
ret = msm_gem_get_and_pin_iova(mdp4_kms->blank_cursor_bo, kms->aspace,
|
2014-04-23 01:27:28 +09:00
|
|
|
&mdp4_kms->blank_cursor_iova);
|
|
|
|
if (ret) {
|
2018-10-21 02:49:26 +09:00
|
|
|
DRM_DEV_ERROR(dev->dev, "could not pin blank-cursor bo: %d\n", ret);
|
2014-04-23 01:27:28 +09:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2015-06-25 08:13:40 +09:00
|
|
|
dev->mode_config.min_width = 0;
|
|
|
|
dev->mode_config.min_height = 0;
|
|
|
|
dev->mode_config.max_width = 2048;
|
|
|
|
dev->mode_config.max_height = 2048;
|
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
return kms;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
if (kms)
|
|
|
|
mdp4_destroy(kms);
|
|
|
|
return ERR_PTR(ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
|
|
|
|
{
|
|
|
|
static struct mdp4_platform_config config = {};
|
2015-11-18 16:14:52 +09:00
|
|
|
|
|
|
|
/* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */
|
2013-12-16 06:23:05 +09:00
|
|
|
config.max_clk = 266667000;
|
|
|
|
config.iommu = iommu_domain_alloc(&platform_bus_type);
|
2016-09-29 08:58:32 +09:00
|
|
|
if (config.iommu) {
|
|
|
|
config.iommu->geometry.aperture_start = 0x1000;
|
|
|
|
config.iommu->geometry.aperture_end = 0xffffffff;
|
|
|
|
}
|
2015-11-18 16:14:52 +09:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-27 01:44:06 +09:00
|
|
|
return &config;
|
|
|
|
}
|