mirror of
https://github.com/brain-hackers/brainlilo
synced 2024-11-01 07:48:00 +09:00
Add support 1st generation Brain
Address information was given by pepepper. Thank you!
This commit is contained in:
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2
.gitignore
vendored
2
.gitignore
vendored
@ -1,2 +1,4 @@
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*.dll
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*.exe
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*.o
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176
BrainLILODrv.cpp
176
BrainLILODrv.cpp
@ -47,6 +47,30 @@
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typedef void (*FileSystemPowerFunctionProc)(DWORD);
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static FileSystemPowerFunctionProc FileSystemPowerFunction;
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// GEN1
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// VA
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#define BOOTLOADER_PRELOADADDR_GEN1 (uint8_t *)0xa0250000
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#define BOOTLOADER_LOADADDR_GEN1 (uint8_t *)0xa3f00000
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#define PHYSICAL_INVOKER_INSTALLADDR_GEN1 (uint8_t *)0xb0000000
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#define TMPA910_REMAP_REGISTER_ADDRESS (uint32_t *)0xaa000004
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// PA
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#define BOOTLOADER_LOADADDR_GEN1_PA (uint8_t *)0x43f00000
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// DEFAULT(GEN2)
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// VA
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#define BOOTLOADER_PRELOADADDR (uint8_t *)0xa0250000
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#define BOOTLOADER_LOADADDR (uint8_t *)0xa0200000
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#define PHYSICAL_INVOKER_INSTALLADDR (uint8_t *)0xb0000000
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// PA
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#define BOOTLOADER_LOADADDR_PA (uint8_t *)0x40200000
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// VA
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uint8_t *bootloader_preload_address = NULL;
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uint8_t *bootloader_load_address = NULL;
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uint8_t *physical_invoker_install_address = NULL;
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// PA
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uint8_t *bootloader_load_address_pa = NULL;
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DWORD fileSize;
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int row;
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int screenW;
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@ -56,20 +80,14 @@ static void outputDebugMessage(const wchar_t *format, ...)
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{
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wchar_t buffer[256] = {0};
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va_list args;
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RECT rcScreen = {
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.left = 0,
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.top = 0,
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.right = screenW,
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.bottom = screenH
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};
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RECT rcScreen = {.left = 0, .top = 0, .right = screenW, .bottom = screenH};
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va_start(args, format);
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vswprintf(buffer, format, args);
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va_end(args);
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OutputDebugString(buffer);
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ExtTextOut(GetDC(NULL), 0, row * 14, ETO_CLIPPED, &rcScreen,
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buffer, wcslen(buffer), NULL);
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ExtTextOut(GetDC(NULL), 0, row * 14, ETO_CLIPPED, &rcScreen, buffer, wcslen(buffer), NULL);
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row++;
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}
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@ -83,42 +101,23 @@ static void disableInterrupts()
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: "r0");
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}
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static void EDNA2_physicalInvoker()
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extern "C" void EDNA2_physicalInvoker();
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static void EnableMemoryRemapGen1()
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{
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// r0-r7=params
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// r8=proc address
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asm volatile("nop\n" // who cares interrupt vectors?
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"msr cpsr_c, #211\n" // to supervisor mode
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"mov r9, #0\n"
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"mcr p15,0,r9,c13,c0,0\n" // clear fcse PID
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"mrc p15,0,r9,c1,c0,0\n" // read ctrl regs
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"bic r9, r9, #5\n" // disable MMU/DCache
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"bic r9, r9, #4096\n" // disable ICache
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"orr r9, r9, #8192\n" // and reset vectors to upper
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"mcr p15,0,r9,c1,c0,0\n" // write ctrl regs
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"mov r9, #0\n"
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"mcr p15,0,r9,c7,c7,0\n" // invalidate cache
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"mcr p15,0,r9,c8,c7,0\n" // invalidate tlb
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"mov pc, r8\n"
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"nop\n"
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"nop\n");
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*TMPA910_REMAP_REGISTER_ADDRESS = 1;
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outputDebugMessage(L"BrainLILO: memory remap enable for Gen1\n");
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}
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static void EDNA2_installPhysicalInvoker()
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static void EDNA2_installPhysicalInvoker(Brain_Gen gen)
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{
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void *ptr = (void *)0xa8000000;
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outputDebugMessage(L"BrainLILO: copying PhysicalInvoker to 0x%p from 0x%p\n",
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ptr, &EDNA2_physicalInvoker);
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memcpy(ptr, (const void *)&EDNA2_physicalInvoker, 64 * 4);
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if (gen == Gen1)
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{
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EnableMemoryRemapGen1();
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}
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outputDebugMessage(L"BrainLILO: copying PhysicalInvoker to 0x%p from 0x%p\n", physical_invoker_install_address,
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&EDNA2_physicalInvoker);
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memcpy(physical_invoker_install_address, (const void *)&EDNA2_physicalInvoker, 64 * 4);
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// clearCache();
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}
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@ -131,8 +130,7 @@ __attribute__((noreturn)) static void EDNA2_runPhysicalInvoker()
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"mcr p15,0,r0,c1,c0,0\n" // write ctrl regs
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);
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for (DWORD i = 0; i < fileSize; i++)
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*((char *)(0xa0200000 + i)) = *((char *)(0xa0000000 + i));
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memcpy(bootloader_load_address, bootloader_preload_address, fileSize);
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asm volatile("ldr r0, =0x0000\n"
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"ldr r1, =0x0000\n"
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@ -142,26 +140,28 @@ __attribute__((noreturn)) static void EDNA2_runPhysicalInvoker()
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"ldr r5, =0x0000\n"
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"ldr r6, =0x0000\n"
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"ldr r7, =0x0000\n"
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"ldr r8, =0x40200000\n"
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"mov r8, %[textbase]\n"
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"ldr r9, =0x0000\n"
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"mrc p15,0,r10,c1,c0,0\n" // read ctrl regs
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"bic r10, r10, #5\n" // disable MMU/DCache
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"mcr p15,0,r10,c1,c0,0\n" // write ctrl regs
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"swi #0\n" // jump!
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);
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: /* no outputs */
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: [textbase] "r"(bootloader_load_address_pa)
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10");
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// never reach here
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while (true)
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;
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}
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__attribute__((noreturn)) static DWORD EDNA2_callKernelEntryPoint()
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__attribute__((noreturn)) static DWORD EDNA2_callKernelEntryPoint(Brain_Gen gen)
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{
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outputDebugMessage(L"BrainLILO: disabling interrupts");
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disableInterrupts();
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outputDebugMessage(L"BrainLILO: injecting code to internal ram");
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EDNA2_installPhysicalInvoker();
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EDNA2_installPhysicalInvoker(gen);
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outputDebugMessage(L"BrainLILO: invoking");
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Sleep(1000);
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@ -173,12 +173,82 @@ static void ShowMessage(std::wstring msg, std::wstring title, UINT typ)
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MessageBox(NULL, msg.c_str(), title.c_str(), typ);
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}
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static void SetAddress(Brain_Gen gen)
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{
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switch (gen)
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{
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case Gen1:
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// VA
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bootloader_preload_address = BOOTLOADER_PRELOADADDR_GEN1;
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bootloader_load_address = BOOTLOADER_LOADADDR_GEN1;
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physical_invoker_install_address = PHYSICAL_INVOKER_INSTALLADDR_GEN1;
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// PA
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bootloader_load_address_pa = BOOTLOADER_LOADADDR_GEN1_PA;
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break;
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default:
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// Gen2?
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// VA
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bootloader_preload_address = BOOTLOADER_PRELOADADDR;
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bootloader_load_address = BOOTLOADER_LOADADDR;
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physical_invoker_install_address = PHYSICAL_INVOKER_INSTALLADDR;
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// PA
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bootloader_load_address_pa = BOOTLOADER_LOADADDR_PA;
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}
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}
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static Brain_Gen SelectGen(std::wstring model)
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{
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Brain_Gen brain_gen = UnknownGen;
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if (model == L"gen1.bin")
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{
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brain_gen = Gen1;
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}
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else if (model == L"gen2.bin")
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{
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brain_gen = Gen2;
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}
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else if (model == L"gen3_1.bin")
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{
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brain_gen = Gen3_1;
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}
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else if (model == L"gen3_2.bin")
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{
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brain_gen = Gen3_2;
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}
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else if (model == L"gen3_3.bin")
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{
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brain_gen = Gen3_3;
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}
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else if (model == L"gen3_4.bin")
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{
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brain_gen = Gen3_4;
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}
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else if (model == L"gen3_5.bin")
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{
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brain_gen = Gen3_5;
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}
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else if (model == L"gen3_6.bin")
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{
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brain_gen = Gen3_6;
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}
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else if (model == L"gen3_7.bin")
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{
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brain_gen = Gen3_7;
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}
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else
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{
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brain_gen = UnknownGen;
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}
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return brain_gen;
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}
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static bool doLinux()
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{
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std::wifstream iVersion;
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std::wstring line, model;
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std::wregex modelRe(L"[A-Z]{2}-[A-Z0-9]+");
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std::wsmatch match;
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Brain_Gen brain_gen = UnknownGen;
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std::wstring fn(L"\\Storage Card\\loader\\");
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HANDLE hUBoot;
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@ -207,7 +277,9 @@ static bool doLinux()
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if (iter != models.end())
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{
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model = iter->second;
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} else {
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}
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else
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{
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outputDebugMessage(L"BrainLILO: internal model name %s is unknown, falling back to u-boot.bin", model.c_str());
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model = L"u-boot.bin";
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}
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@ -215,6 +287,10 @@ static bool doLinux()
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fn += model;
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outputDebugMessage(L"BrainLILO: opening Bootloader file: %s", fn.c_str());
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brain_gen = SelectGen(model);
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outputDebugMessage(L"BrainLILO: This is %d generation Brain", brain_gen);
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SetAddress(brain_gen);
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hUBoot = CreateFile(fn.c_str(), GENERIC_READ, 0, NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL);
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if (hUBoot == INVALID_HANDLE_VALUE)
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{
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@ -228,8 +304,8 @@ static bool doLinux()
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fileSize = GetFileSize(hUBoot, NULL);
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outputDebugMessage(L"BrainLILO: bootloader file size %d Byte", fileSize);
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outputDebugMessage(L"BrainLILO: preloading bootloader to 0x%p...", 0xa0000000);
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if (!ReadFile(hUBoot, (void *)0xa0000000, fileSize, &wReadSize, NULL))
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outputDebugMessage(L"BrainLILO: preloading bootloader to 0x%p...", bootloader_preload_address);
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if (!ReadFile(hUBoot, (void *)bootloader_preload_address, fileSize, &wReadSize, NULL))
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{
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outputDebugMessage(L"BrainLILO: could not read the bootloader");
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ShowMessage(L"Could not read the bootloader", L"BrainLILO", MB_ICONWARNING);
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@ -243,7 +319,7 @@ static bool doLinux()
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FileSystemPowerFunction(FSNOTIFY_POWER_OFF);
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outputDebugMessage(L"BrainLILO: starting bootloader call sequence...");
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EDNA2_callKernelEntryPoint();
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EDNA2_callKernelEntryPoint(brain_gen);
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return true;
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}
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30
EDNA2_physicalInvoker.S
Normal file
30
EDNA2_physicalInvoker.S
Normal file
@ -0,0 +1,30 @@
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.align 4
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.global EDNA2_physicalInvoker
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EDNA2_physicalInvoker:
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// r0-r7=params
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// r8=proc address
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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msr cpsr_c, #211 // to supervisor mode
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mov r9, #0
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mcr p15,0,r9,c13,c0,0 // clear fcse PID
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mrc p15,0,r9,c1,c0,0 // read ctrl regs
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bic r9, r9, #5 // disable MMU/DCache
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bic r9, r9, #4096 // disable ICache
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orr r9, r9, #8192 // and reset vectors to upper
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mcr p15,0,r9,c1,c0,0 // write ctrl regs
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mov r9, #0
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mcr p15,0,r9,c7,c7,0 // invalidate cache
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mcr p15,0,r9,c8,c7,0 // invalidate tlb
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mov pc, r8
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nop
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nop
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4
Makefile
4
Makefile
@ -42,8 +42,8 @@ BrainLILO.dll: BrainLILO.cpp
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$(CXX) BrainLILO.cpp -o BrainLILO.dll $(DLLFLAGS)
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$(STRIP) BrainLILO.dll
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BrainLILODrv.dll: BrainLILODrv.cpp
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$(CXX) BrainLILODrv.cpp -o BrainLILODrv.dll $(DRVFLAGS)
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BrainLILODrv.dll: BrainLILODrv.cpp EDNA2_physicalInvoker.S
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$(CXX) BrainLILODrv.cpp EDNA2_physicalInvoker.S -o BrainLILODrv.dll $(DRVFLAGS)
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$(STRIP) BrainLILODrv.dll
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BrainLILO.exe: bootloader.cpp
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