Disable timer and interrupts

This commit is contained in:
Takumi Sueda 2021-03-10 00:32:07 +09:00
parent 1a061b3c7d
commit a441be9976

View File

@ -3,9 +3,18 @@
.global _start
_start:
mov r9, #0
ldr r0, =0x67800000
cpsid if
mrc p15, 0, r8, c14, c2, 1
bic r8, r8, #1
mcr p15, 0, r8, c14, c2, 1
mrc p15, 0, r8, c14, c3, 1
bic r8, r8, #1
mcr p15, 0, r8, c14, c3, 1
mov r9, #0
mrc p15, 0, r10, c1, c0, 0
@bic r10, r10, #5 @ disable MMU and dcache
bic r10, r10, #1 @ disable MMU